2 * (C) Copyright 2003-2004
3 * MPC Data Limited (http://www.mpc-data.co.uk)
4 * Dave Peverley <dpeverley at mpc-data.co.uk>
6 * Configuation settings for the TI OMAP Perseus 2 board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /* allow to overwrite serial and ethaddr */
31 #define CONFIG_ENV_OVERWRITE
34 * High Level Configuration Options
38 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
39 #define CONFIG_OMAP 1 /* in a TI OMAP core */
40 #define CONFIG_OMAP730 1 /* which is in a 730 */
41 #define CONFIG_P2_OMAP730 1 /* a Perseus 2 Board */
45 * The OMAP730 Perseus 2 has 13MHz input clock
48 #define CONFIG_SYS_CLK_FREQ 13000000
50 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
52 #define CONFIG_MISC_INIT_R
54 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
55 #define CONFIG_SETUP_MEMORY_TAGS 1
58 * Size of malloc() pool
61 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
62 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
68 #define CONFIG_NET_MULTI
69 #define CONFIG_LAN91C96
70 #define CONFIG_LAN91C96_BASE 0x04000300
71 #define CONFIG_LAN91C96_EXT_PHY
74 * NS16550 Configuration
77 #define CONFIG_SYS_NS16550
78 #define CONFIG_SYS_NS16550_SERIAL
79 #define CONFIG_SYS_NS16550_REG_SIZE (1)
80 #define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
81 #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
85 * select serial console configuration
88 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP730 Perseus 2 */
90 #define CONFIG_CONS_INDEX 1
91 #define CONFIG_BAUDRATE 115200
92 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
96 * Command line configuration.
98 #include <config_cmd_default.h>
100 #define CONFIG_CMD_DHCP
106 #define CONFIG_BOOTP_SUBNETMASK
107 #define CONFIG_BOOTP_GATEWAY
108 #define CONFIG_BOOTP_HOSTNAME
109 #define CONFIG_BOOTP_BOOTPATH
112 #include <configs/omap730.h>
113 #include <configs/h2_p2_dbg_board.h>
115 #define CONFIG_BOOTDELAY 3
116 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp"
118 #define CONFIG_LOADADDR 0x10000000
120 #define CONFIG_ETHADDR
121 #define CONFIG_NETMASK 255.255.255.0
122 #define CONFIG_IPADDR 192.168.0.23
123 #define CONFIG_SERVERIP 192.150.0.100
124 #define CONFIG_BOOTFILE "uImage" /* File to load */
126 #if defined(CONFIG_CMD_KGDB)
127 #define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */
128 #define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */
132 * Miscellaneous configurable options
135 #define CONFIG_SYS_LONGHELP /* undef to save memory */
136 #define CONFIG_SYS_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */
137 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
138 /* Print Buffer Size */
139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
140 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
141 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
143 #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
144 #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
146 #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
148 /* The OMAP730 has 3 general purpose MPU timers, they can be driven by
149 * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
152 #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
153 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
154 #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
156 /*-----------------------------------------------------------------------
159 * The stack sizes are set up in start.S using the settings below
162 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
163 #ifdef CONFIG_USE_IRQ
164 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
165 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
168 /*-----------------------------------------------------------------------
169 * Physical Memory Map
172 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
173 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
174 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
176 #if defined(CONFIG_CS0_BOOT)
177 #define PHYS_FLASH_1 0x0C000000
178 #elif defined(CONFIG_CS3_BOOT)
179 #define PHYS_FLASH_1 0x00000000
181 #error Unknown Boot Chip-Select number
184 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
186 /*-----------------------------------------------------------------------
187 * FLASH and environment organization
190 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
191 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
192 #define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
193 /* addr of environment */
194 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
196 /* timeout values are in ticks */
197 #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
198 #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
200 #define CONFIG_ENV_IS_IN_FLASH 1
201 #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
202 #define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
204 #endif /* ! __CONFIG_H */