3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
9 * Configuration settings for the TI EVM5430 board.
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 * High Level Configuration Options
36 #define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
37 #define CONFIG_OMAP /* in a TI OMAP core */
38 #define CONFIG_OMAP54XX /* which is a 54XX */
39 #define CONFIG_OMAP5430 /* which is in a 5430 */
40 #define CONFIG_5430EVM /* working with EVM */
41 #define CONFIG_ARCH_CPU_INIT
44 #include <asm/arch/cpu.h>
45 #include <asm/arch/omap.h>
47 /* Display CPU and Board Info */
48 #define CONFIG_DISPLAY_CPUINFO
49 #define CONFIG_DISPLAY_BOARDINFO
52 #define V_OSCK 38400000 /* Clock output from T2 */
55 #undef CONFIG_USE_IRQ /* no support for IRQs */
56 #define CONFIG_MISC_INIT_R
58 #define CONFIG_OF_LIBFDT
60 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
61 #define CONFIG_SETUP_MEMORY_TAGS
62 #define CONFIG_INITRD_TAG
65 * Size of malloc() pool
66 * Total Size Environment - 128k
69 #define CONFIG_ENV_SIZE (128 << 10)
70 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
72 #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
79 * serial port - NS16550 compatible
81 #define V_NS16550_CLK 48000000
83 #define CONFIG_SYS_NS16550
84 #define CONFIG_SYS_NS16550_SERIAL
85 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
86 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
87 #define CONFIG_CONS_INDEX 3
88 #define CONFIG_SYS_NS16550_COM3 UART3_BASE
90 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
94 #define CONFIG_HARD_I2C
95 #define CONFIG_SYS_I2C_SPEED 100000
96 #define CONFIG_SYS_I2C_SLAVE 1
97 #define CONFIG_DRIVER_OMAP34XX_I2C
98 #define CONFIG_I2C_MULTI_BUS
101 #define CONFIG_TWL6030_POWER
102 #define CONFIG_CMD_BAT
105 #define CONFIG_GENERIC_MMC
107 #define CONFIG_OMAP_HSMMC
108 #define CONFIG_DOS_PARTITION
110 /* MMC ENV related defines */
111 #define CONFIG_ENV_IS_IN_MMC
112 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
113 #define CONFIG_ENV_OFFSET 0xE0000
116 #define CONFIG_MUSB_UDC
117 #define CONFIG_USB_OMAP3
119 /* USB device configuration */
120 #define CONFIG_USB_DEVICE
121 #define CONFIG_USB_TTY
122 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
125 #define CONFIG_SYS_NO_FLASH
128 #define CONFIG_SYS_CACHELINE_SIZE 64
129 #define CONFIG_SYS_CACHELINE_SHIFT 6
131 /* commands to include */
132 #include <config_cmd_default.h>
134 /* Enabled commands */
135 #define CONFIG_CMD_EXT2 /* EXT2 Support */
136 #define CONFIG_CMD_FAT /* FAT support */
137 #define CONFIG_CMD_I2C /* I2C serial bus support */
138 #define CONFIG_CMD_MMC /* MMC support */
139 #define CONFIG_CMD_SAVEENV
141 /* Disabled commands */
142 #undef CONFIG_CMD_NET
143 #undef CONFIG_CMD_NFS
144 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
145 #undef CONFIG_CMD_IMLS /* List all found images */
151 #define CONFIG_BOOTDELAY 3
153 #define CONFIG_ENV_OVERWRITE
155 #define CONFIG_EXTRA_ENV_SETTINGS \
156 "loadaddr=0x82000000\0" \
157 "console=ttyS2,115200n8\0" \
161 "mmcroot=/dev/mmcblk0p2 rw\0" \
162 "mmcrootfstype=ext3 rootwait\0" \
163 "mmcargs=setenv bootargs console=${console} " \
166 "rootfstype=${mmcrootfstype}\0" \
167 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
168 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
169 "source ${loadaddr}\0" \
170 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
171 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
173 "bootm ${loadaddr}\0" \
175 #define CONFIG_BOOTCOMMAND \
176 "if mmc rescan ${mmcdev}; then " \
177 "if run loadbootscript; then " \
180 "if run loaduimage; then " \
186 #define CONFIG_AUTO_COMPLETE 1
189 * Miscellaneous configurable options
192 #define CONFIG_SYS_LONGHELP /* undef to save memory */
193 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
194 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
195 #define CONFIG_SYS_PROMPT "OMAP5430 EVM # "
196 #define CONFIG_SYS_CBSIZE 256
197 /* Print Buffer Size */
198 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
199 sizeof(CONFIG_SYS_PROMPT) + 16)
200 #define CONFIG_SYS_MAXARGS 16
201 /* Boot Argument Buffer Size */
202 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
207 #define CONFIG_SYS_MEMTEST_START 0x80000000
208 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
210 /* Default load address */
211 #define CONFIG_SYS_LOAD_ADDR 0x80000000
213 /* Use General purpose timer 1 */
214 #define CONFIG_SYS_TIMERBASE GPT2_BASE
215 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
216 #define CONFIG_SYS_HZ 1000
221 * The stack sizes are set up in start.S using the settings below
223 #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
224 #ifdef CONFIG_USE_IRQ
225 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
226 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
231 * Even though we use two CS all the memory
232 * is mapped to one contiguous block
234 #define CONFIG_NR_DRAM_BANKS 1
236 #define CONFIG_SYS_SDRAM_BASE 0x80000000
237 #define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
238 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
239 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
240 CONFIG_SYS_INIT_RAM_SIZE - \
241 GENERATED_GBL_DATA_SIZE)
243 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
245 /* Defines for SDRAM init */
246 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
247 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
248 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
251 /* Defines for SPL */
253 #define CONFIG_SPL_TEXT_BASE 0x40304350
254 #define CONFIG_SPL_MAX_SIZE 0x1E000 /* 120K */
255 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
257 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
258 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
259 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
260 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
262 #define CONFIG_SPL_LIBCOMMON_SUPPORT
263 #define CONFIG_SPL_LIBDISK_SUPPORT
264 #define CONFIG_SPL_I2C_SUPPORT
265 #define CONFIG_SPL_MMC_SUPPORT
266 #define CONFIG_SPL_FAT_SUPPORT
267 #define CONFIG_SPL_LIBGENERIC_SUPPORT
268 #define CONFIG_SPL_SERIAL_SUPPORT
269 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"
272 * 64 bytes before this address should be set aside for u-boot.img's
273 * header. That is 80E7FFC0--0x80E80000 should not be used for any
276 #define CONFIG_SYS_TEXT_BASE 0x80E80000
279 * BSS and malloc area 64MB into memory to allow enough
280 * space for the kernel at the beginning of memory
282 #define CONFIG_SPL_BSS_START_ADDR 0x84000000
283 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
284 #define CONFIG_SYS_SPL_MALLOC_START 0x84100000
285 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
287 #endif /* __CONFIG_H */