3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
9 * TI OMAP5 AND DRA7XX common configuration settings
11 * SPDX-License-Identifier: GPL-2.0+
13 * For more details, please see the technical documents listed at
14 * http://www.ti.com/product/omap5432
17 #ifndef __CONFIG_OMAP5_COMMON_H
18 #define __CONFIG_OMAP5_COMMON_H
20 #define CONFIG_OMAP54XX
21 #define CONFIG_DISPLAY_CPUINFO
22 #define CONFIG_DISPLAY_BOARDINFO
23 #define CONFIG_MISC_INIT_R
24 #define CONFIG_ARCH_CPU_INIT
26 #define CONFIG_SYS_CACHELINE_SIZE 64
28 /* Use General purpose timer 1 */
29 #define CONFIG_SYS_TIMERBASE GPT2_BASE
32 * For the DDR timing information we can either dynamically determine
33 * the timings to use or use pre-determined timings (based on using the
34 * dynamic method. Default to the static timing infomation.
36 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
37 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
38 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
39 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
42 #ifndef CONFIG_SPL_BUILD
43 #define CONFIG_PALMAS_POWER
46 #include <asm/arch/cpu.h>
47 #include <asm/arch/omap.h>
49 #define CONFIG_ENV_SIZE (128 << 10)
51 #include <configs/ti_armv7_common.h>
56 #define CONFIG_SYS_NS16550
57 #define CONFIG_SYS_NS16550_SERIAL
58 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
59 #define CONFIG_SYS_NS16550_CLK 48000000
61 /* Per-SoC commands */
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73 "loadaddr=0x82000000\0" \
74 "console=" CONSOLEDEV ",115200n8\0" \
75 "fdt_high=0xffffffff\0" \
76 "fdtaddr=0x80f80000\0" \
77 "fdtfile=undefined\0" \
83 "partitions=" PARTS_DEFAULT "\0" \
86 "mmcroot=/dev/mmcblk0p2 rw\0" \
87 "mmcrootfstype=ext4 rootwait\0" \
88 "mmcargs=setenv bootargs console=${console} " \
92 "rootfstype=${mmcrootfstype}\0" \
93 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
94 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
95 "source ${loadaddr}\0" \
96 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
97 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
98 "env import -t ${loadaddr} ${filesize}\0" \
99 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
100 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
102 "bootz ${loadaddr} - ${fdtaddr}\0" \
104 "if test $board_name = omap5_uevm; then " \
105 "setenv fdtfile omap5-uevm.dtb; fi; " \
106 "if test $board_name = dra7xx; then " \
107 "setenv fdtfile dra7-evm.dtb; fi;" \
108 "if test $fdtfile = undefined; then " \
109 "echo WARNING: Could not determine device tree to use; fi; \0" \
110 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
112 #define CONFIG_BOOTCOMMAND \
114 "mmc dev ${mmcdev}; if mmc rescan; then " \
115 "if run loadbootscript; then " \
118 "if run loadbootenv; then " \
119 "run importbootenv; " \
121 "if test -n ${uenvcmd}; then " \
122 "echo Running uenvcmd ...;" \
126 "if run loadimage; then " \
134 * SPL related defines. The Public RAM memory map the ROM defines the
135 * area between 0x40300000 and 0x4031E000 as a download area for OMAP5
136 * (dra7xx is larger, but we do not need to be larger at this time). We
137 * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
138 * print some information.
140 #define CONFIG_SPL_TEXT_BASE 0x40300000
141 #define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE)
142 #define CONFIG_SPL_DISPLAY_PRINT
143 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
145 #endif /* __CONFIG_OMAP5_COMMON_H */