4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
33 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
34 #define CONFIG_OMAP 1 /* in a TI OMAP core */
35 #define CONFIG_OMAP1610 1 /* 5912 is same as 1610 */
36 #define CONFIG_OSK_OMAP5912 1 /* a OSK Board */
38 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
39 #define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
41 /* input clock of PLL */
42 /* the OMAP5912 OSK has 12MHz input clock */
43 #define CONFIG_SYS_CLK_FREQ 12000000
45 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS 1
47 #define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */
50 * Size of malloc() pool
52 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
59 #define CONFIG_LAN91C96
60 #define CONFIG_LAN91C96_BASE 0x04800300
61 #define CONFIG_LAN91C96_EXT_PHY
64 * NS16550 Configuration
66 #define CONFIG_SYS_NS16550
67 #define CONFIG_SYS_NS16550_SERIAL
68 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
69 #define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
70 #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
74 * select serial console configuration
76 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP5912 OSK */
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_CONS_INDEX 1
81 #define CONFIG_BAUDRATE 115200
84 * Command line configuration.
86 #include <config_cmd_default.h>
88 #define CONFIG_CMD_DHCP
94 #define CONFIG_BOOTP_SUBNETMASK
95 #define CONFIG_BOOTP_GATEWAY
96 #define CONFIG_BOOTP_HOSTNAME
97 #define CONFIG_BOOTP_BOOTPATH
100 #include <configs/omap1510.h>
102 #define CONFIG_BOOTDELAY 3
103 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
104 root=/dev/nfs rw nfsroot=157.87.82.48:\
105 /home/mwd/myfs/target ip=dhcp"
106 #define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
107 #define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
108 #define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
109 #define CONFIG_BOOTFILE "uImage" /* file to load */
111 #if defined(CONFIG_CMD_KGDB)
112 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
113 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
117 * Miscellaneous configurable options
119 #define CONFIG_SYS_LONGHELP /* undef to save memory */
120 #define CONFIG_SYS_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */
121 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
122 /* Print Buffer Size */
123 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
124 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
125 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
127 #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
128 #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
130 #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
132 /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
133 * DPLL1. This time is further subdivided by a local divisor.
135 #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
136 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
137 #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
139 /*-----------------------------------------------------------------------
140 * Physical Memory Map
142 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
143 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
144 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
146 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
147 #define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */
149 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
151 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
153 #define PHYS_SRAM 0x20000000
155 /*-----------------------------------------------------------------------
158 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
159 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
161 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
163 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
164 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
165 #define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
167 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
168 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
170 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
172 /* timeout values are in ticks */
173 #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
174 #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
176 /*-----------------------------------------------------------------------
177 * FLASH and environment organization
179 #define CONFIG_ENV_IS_IN_FLASH 1
180 /* addr of environment */
181 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
183 #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
184 #define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
186 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
187 #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
189 #endif /* __CONFIG_H */