4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
17 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
18 #define CONFIG_OMAP 1 /* in a TI OMAP core */
19 #define CONFIG_OMAP1610 1 /* 5912 is same as 1610 */
20 #define CONFIG_OSK_OMAP5912 1 /* a OSK Board */
22 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
23 #define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
25 /* input clock of PLL */
26 /* the OMAP5912 OSK has 12MHz input clock */
27 #define CONFIG_SYS_CLK_FREQ 12000000
29 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
30 #define CONFIG_SETUP_MEMORY_TAGS 1
31 #define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */
34 * Size of malloc() pool
36 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
43 #define CONFIG_LAN91C96
44 #define CONFIG_LAN91C96_BASE 0x04800300
45 #define CONFIG_LAN91C96_EXT_PHY
48 * NS16550 Configuration
50 #define CONFIG_SYS_NS16550
51 #define CONFIG_SYS_NS16550_SERIAL
52 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
53 #define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
54 #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
58 * select serial console configuration
60 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP5912 OSK */
62 /* allow to overwrite serial and ethaddr */
63 #define CONFIG_ENV_OVERWRITE
64 #define CONFIG_CONS_INDEX 1
65 #define CONFIG_BAUDRATE 115200
68 * Command line configuration.
70 #include <config_cmd_default.h>
72 #define CONFIG_CMD_DHCP
78 #define CONFIG_BOOTP_SUBNETMASK
79 #define CONFIG_BOOTP_GATEWAY
80 #define CONFIG_BOOTP_HOSTNAME
81 #define CONFIG_BOOTP_BOOTPATH
84 #include <configs/omap1510.h>
86 #define CONFIG_BOOTDELAY 3
87 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
88 root=/dev/nfs rw nfsroot=157.87.82.48:\
89 /home/mwd/myfs/target ip=dhcp"
90 #define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
91 #define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
92 #define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
93 #define CONFIG_BOOTFILE "uImage" /* file to load */
95 #if defined(CONFIG_CMD_KGDB)
96 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
97 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
101 * Miscellaneous configurable options
103 #define CONFIG_SYS_LONGHELP /* undef to save memory */
104 #define CONFIG_SYS_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */
105 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
106 /* Print Buffer Size */
107 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
108 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
109 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
111 #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
112 #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
114 #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
116 /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
117 * DPLL1. This time is further subdivided by a local divisor.
119 #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
120 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
121 #define CONFIG_SYS_HZ 1000
123 /*-----------------------------------------------------------------------
124 * Physical Memory Map
126 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
127 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
128 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
130 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
131 #define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */
133 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
135 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
137 #define PHYS_SRAM 0x20000000
139 /*-----------------------------------------------------------------------
142 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
143 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
145 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
147 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
148 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
149 #define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
151 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
152 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
154 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
156 /* timeout values are in ticks */
157 #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
158 #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
160 /*-----------------------------------------------------------------------
161 * FLASH and environment organization
163 #define CONFIG_ENV_IS_IN_FLASH 1
164 /* addr of environment */
165 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
167 #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
168 #define CONFIG_ENV_OFFSET 0x40000 /* environment starts here */
170 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
171 #define CONFIG_SYS_INIT_RAM_ADDR PHYS_SRAM
172 #define CONFIG_SYS_INIT_RAM_SIZE (250 * 1024)
173 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
174 CONFIG_SYS_INIT_RAM_SIZE)
176 #endif /* __CONFIG_H */