3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
7 * TI OMAP4 common configuration settings
9 * SPDX-License-Identifier: GPL-2.0+
12 #ifndef __CONFIG_OMAP4_COMMON_H
13 #define __CONFIG_OMAP4_COMMON_H
16 * High Level Configuration Options
18 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
19 #define CONFIG_OMAP 1 /* in a TI OMAP core */
20 #define CONFIG_OMAP44XX 1 /* which is a 44XX */
21 #define CONFIG_OMAP4430 1 /* which is in a 4430 */
22 #define CONFIG_OMAP_GPIO
23 #define CONFIG_OMAP_COMMON
26 #include <asm/arch/cpu.h>
27 #include <asm/arch/omap.h>
29 /* Display CPU and Board Info */
30 #define CONFIG_DISPLAY_CPUINFO 1
31 #define CONFIG_DISPLAY_BOARDINFO 1
33 #define CONFIG_MISC_INIT_R
35 #define CONFIG_OF_LIBFDT 1
36 #define CONFIG_CMD_BOOTZ
37 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS 1
39 #define CONFIG_INITRD_TAG 1
40 #define CONFIG_REVISION_TAG 1
43 * Size of malloc() pool
44 * Total Size Environment - 128k
47 #define CONFIG_ENV_SIZE (128 << 10)
48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
50 #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
57 * serial port - NS16550 compatible
59 #define V_NS16550_CLK 48000000
61 #define CONFIG_SYS_NS16550
62 #define CONFIG_SYS_NS16550_SERIAL
63 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
64 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
65 #define CONFIG_CONS_INDEX 3
66 #define CONFIG_SYS_NS16550_COM3 UART3_BASE
68 #define CONFIG_BAUDRATE 115200
69 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
73 #define CONFIG_ARCH_CPU_INIT
76 #define CONFIG_HARD_I2C 1
77 #define CONFIG_SYS_I2C_SPEED 100000
78 #define CONFIG_SYS_I2C_SLAVE 1
79 #define CONFIG_DRIVER_OMAP34XX_I2C 1
80 #define CONFIG_I2C_MULTI_BUS 1
83 #ifndef CONFIG_SPL_BUILD
84 #define CONFIG_TWL6030_POWER 1
88 #define CONFIG_GENERIC_MMC 1
90 #define CONFIG_OMAP_HSMMC 1
91 #define CONFIG_DOS_PARTITION 1
95 #define CONFIG_MUSB_UDC 1
96 #define CONFIG_USB_OMAP3 1
98 /* USB device configuration */
99 #define CONFIG_USB_DEVICE 1
100 #define CONFIG_USB_TTY 1
101 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
104 #define CONFIG_SYS_NO_FLASH 1
106 /* commands to include */
107 #include <config_cmd_default.h>
109 /* Enabled commands */
110 #define CONFIG_CMD_EXT2 /* EXT2 Support */
111 #define CONFIG_CMD_FAT /* FAT support */
112 #define CONFIG_CMD_I2C /* I2C serial bus support */
113 #define CONFIG_CMD_MMC /* MMC support */
115 /* Disabled commands */
116 #undef CONFIG_CMD_NET
117 #undef CONFIG_CMD_NFS
118 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
119 #undef CONFIG_CMD_IMLS /* List all found images */
125 #define CONFIG_BOOTDELAY 3
126 #define CONFIG_ENV_VARS_UBOOT_CONFIG
127 #define CONFIG_CMD_FS_GENERIC
128 #define CONFIG_CMD_EXT2
129 #define CONFIG_CMD_EXT4
131 #define CONFIG_ENV_OVERWRITE
133 #define CONFIG_EXTRA_ENV_SETTINGS \
134 "loadaddr=0x82000000\0" \
135 "console=ttyO2,115200n8\0" \
136 "fdt_high=0xffffffff\0" \
137 "fdtaddr=0x80f80000\0" \
138 "fdtfile=undefined\0" \
141 "bootfile=zImage\0" \
145 "mmcroot=/dev/mmcblk0p2 rw\0" \
146 "mmcrootfstype=ext3 rootwait\0" \
147 "mmcargs=setenv bootargs console=${console} " \
150 "rootfstype=${mmcrootfstype}\0" \
151 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
152 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
153 "source ${loadaddr}\0" \
154 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
155 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
156 "env import -t ${loadaddr} ${filesize}\0" \
157 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
158 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
160 "bootz ${loadaddr} - ${fdtaddr}\0" \
162 "if test $board_name = sdp4430; then " \
163 "setenv fdtfile omap4-sdp.dtb; fi; " \
164 "if test $board_name = panda; then " \
165 "setenv fdtfile omap4-panda.dtb; fi;" \
166 "if test $board_name = panda-a4; then " \
167 "setenv fdtfile omap4-panda-a4.dtb; fi;" \
168 "if test $board_name = panda-es; then " \
169 "setenv fdtfile omap4-panda-es.dtb; fi;" \
170 "if test $fdtfile = undefined; then " \
171 "echo WARNING: Could not determine device tree to use; fi; \0" \
172 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
174 #define CONFIG_BOOTCOMMAND \
176 "mmc dev ${mmcdev}; if mmc rescan; then " \
177 "echo SD/MMC found on device ${mmcdev};" \
178 "if run loadbootscript; then " \
181 "if run loadbootenv; then " \
182 "run importbootenv; " \
184 "if test -n ${uenvcmd}; then " \
185 "echo Running uenvcmd ...;" \
189 "if run loadimage; then " \
195 #define CONFIG_AUTO_COMPLETE 1
198 * Miscellaneous configurable options
201 #define CONFIG_SYS_LONGHELP /* undef to save memory */
202 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
203 #define CONFIG_SYS_CBSIZE 512
204 /* Print Buffer Size */
205 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
206 sizeof(CONFIG_SYS_PROMPT) + 16)
207 #define CONFIG_SYS_MAXARGS 16
208 /* Boot Argument Buffer Size */
209 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
214 #define CONFIG_SYS_MEMTEST_START 0x80000000
215 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
217 /* Default load address */
218 #define CONFIG_SYS_LOAD_ADDR 0x80000000
220 /* Use General purpose timer 1 */
221 #define CONFIG_SYS_TIMERBASE GPT2_BASE
222 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
223 #define CONFIG_SYS_HZ 1000
227 * Even though we use two CS all the memory
228 * is mapped to one contiguous block
230 #define CONFIG_NR_DRAM_BANKS 1
232 #define CONFIG_SYS_SDRAM_BASE 0x80000000
233 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
234 GENERATED_GBL_DATA_SIZE)
236 #ifndef CONFIG_SYS_L2CACHE_OFF
237 #define CONFIG_SYS_L2_PL310 1
238 #define CONFIG_SYS_PL310_BASE 0x48242000
240 #define CONFIG_SYS_CACHELINE_SIZE 32
242 /* Defines for SDRAM init */
243 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
245 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
246 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
247 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
250 /* Defines for SPL */
252 #define CONFIG_SPL_FRAMEWORK
253 #define CONFIG_SPL_TEXT_BASE 0x40304350
254 #define CONFIG_SPL_MAX_SIZE (38 * 1024)
255 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
256 #define CONFIG_SPL_DISPLAY_PRINT
259 * 64 bytes before this address should be set aside for u-boot.img's
260 * header. That is 80E7FFC0--0x80E80000 should not be used for any
263 #define CONFIG_SYS_TEXT_BASE 0x80E80000
266 * BSS and malloc area 64MB into memory to allow enough
267 * space for the kernel at the beginning of memory
269 #define CONFIG_SPL_BSS_START_ADDR 0x84000000
270 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
271 #define CONFIG_SYS_SPL_MALLOC_START 0x84100000
272 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
274 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
275 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
276 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
277 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
279 #define CONFIG_SPL_LIBCOMMON_SUPPORT
280 #define CONFIG_SPL_LIBDISK_SUPPORT
281 #define CONFIG_SPL_I2C_SUPPORT
282 #define CONFIG_SPL_MMC_SUPPORT
283 #define CONFIG_SPL_FAT_SUPPORT
284 #define CONFIG_SPL_LIBGENERIC_SUPPORT
285 #define CONFIG_SPL_SERIAL_SUPPORT
286 #define CONFIG_SPL_GPIO_SUPPORT
287 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
289 #define CONFIG_SYS_THUMB_BUILD
291 #endif /* __CONFIG_OMAP4_COMMON_H */