2 * (C) Copyright 2006-2009
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * Nishanth Menon <nm@ti.com>
7 * Tom Rix <Tom.Rix@windriver.com>
9 * Configuration settings for the TI OMAP3430 Zoom II board.
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 * High Level Configuration Options
36 #define CONFIG_OMAP 1 /* in a TI OMAP core */
37 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
38 #define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */
39 #define CONFIG_OMAP_GPIO
41 #define CONFIG_SDRC /* The chip has SDRC controller */
43 #include <asm/arch/cpu.h> /* get chip and board defs */
44 #include <asm/arch/omap3.h>
47 * Display CPU and Board information
49 #define CONFIG_DISPLAY_CPUINFO 1
50 #define CONFIG_DISPLAY_BOARDINFO 1
53 #define V_OSCK 26000000 /* Clock output from T2 */
54 #define V_SCLK (V_OSCK >> 1)
56 #define CONFIG_MISC_INIT_R
58 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS 1
60 #define CONFIG_INITRD_TAG 1
61 #define CONFIG_REVISION_TAG 1
63 #define CONFIG_OF_LIBFDT 1
66 * Size of malloc() pool
68 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
70 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
76 * NS16550 Configuration
77 * Zoom2 uses the TL16CP754C on the debug board
80 * 0 - 1 : first USB with respect to the left edge of the debug board
81 * 2 - 3 : second USB with respect to the left edge of the debug board
83 #define ZOOM2_DEFAULT_SERIAL_DEVICE 0
85 #define V_NS16550_CLK (1843200) /* 1.8432 Mhz */
87 #define CONFIG_SYS_NS16550
88 #define CONFIG_SYS_NS16550_REG_SIZE (-2)
89 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
90 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE {115200}
93 /* allow to overwrite serial and ethaddr */
94 #define CONFIG_ENV_OVERWRITE
96 #define CONFIG_GENERIC_MMC 1
98 #define CONFIG_OMAP_HSMMC 1
99 #define CONFIG_DOS_PARTITION 1
102 #define CONFIG_STATUS_LED 1 /* Status LED enabled */
103 #define CONFIG_BOARD_SPECIFIC_LED 1
104 #define STATUS_LED_BLUE 0
105 #define STATUS_LED_RED 1
107 #define STATUS_LED_BIT STATUS_LED_BLUE
108 #define STATUS_LED_STATE STATUS_LED_ON
109 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
111 #define STATUS_LED_BIT1 STATUS_LED_RED
112 #define STATUS_LED_STATE1 STATUS_LED_OFF
113 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
115 #define STATUS_LED_BOOT STATUS_LED_BIT
118 #ifdef CONFIG_STATUS_LED
119 #define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */
120 #define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */
122 #define CONFIG_OMAP3_GPIO_3 /* board revision */
123 #define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
126 #define CONFIG_MUSB_UDC 1
127 #define CONFIG_USB_OMAP3 1
128 #define CONFIG_TWL4030_USB 1
130 /* USB device configuration */
131 #define CONFIG_USB_DEVICE 1
132 #define CONFIG_USB_TTY 1
133 /* Change these to suit your needs */
134 #define CONFIG_USBD_VENDORID 0x0451
135 #define CONFIG_USBD_PRODUCTID 0x5678
136 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
137 #define CONFIG_USBD_PRODUCT_NAME "Zoom2"
139 /* commands to include */
140 #include <config_cmd_default.h>
142 #define CONFIG_CMD_FAT /* FAT support */
143 #define CONFIG_CMD_I2C /* I2C serial bus support */
144 #define CONFIG_CMD_MMC /* MMC support */
145 #define CONFIG_CMD_NAND /* NAND support */
146 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
148 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
149 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
150 #undef CONFIG_CMD_IMI /* iminfo */
151 #undef CONFIG_CMD_IMLS /* List all found images */
152 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
153 #undef CONFIG_CMD_NFS /* NFS support */
155 #define CONFIG_SYS_NO_FLASH
156 #define CONFIG_HARD_I2C 1
157 #define CONFIG_SYS_I2C_SPEED 100000
158 #define CONFIG_SYS_I2C_SLAVE 1
159 #define CONFIG_DRIVER_OMAP34XX_I2C 1
164 #define CONFIG_TWL4030_POWER 1
165 #define CONFIG_TWL4030_LED 1
170 #define CONFIG_NAND_OMAP_GPMC
171 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
173 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
174 /* to access nand at */
176 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
177 #define CONFIG_SYS_MAX_NAND_DEVICE 1
179 /* Environment information */
180 #define CONFIG_BOOTDELAY 10
182 #define CONFIG_EXTRA_ENV_SETTINGS \
185 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
186 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
187 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
188 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
189 CONFIG_SYS_INIT_RAM_SIZE - \
190 GENERATED_GBL_DATA_SIZE)
192 * Miscellaneous configurable options
195 #define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # "
196 #define CONFIG_SYS_LONGHELP
197 #define CONFIG_SYS_CBSIZE 512
198 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
199 sizeof(CONFIG_SYS_PROMPT) + 16)
200 #define CONFIG_SYS_MAXARGS 16
201 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
202 /* Memtest from start of memory to 31MB */
203 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
204 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)
205 /* The default load address is the start of memory */
206 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
207 /* everything, incl board info, in Hz */
208 #undef CONFIG_SYS_CLKS_IN_HZ
210 * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
211 * 32KHz clk, or from external sig. This rate is divided by a local divisor.
213 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
214 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
215 #define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
217 /*-----------------------------------------------------------------------
218 * Physical Memory Map
220 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
221 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
222 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
224 /*-----------------------------------------------------------------------
225 * FLASH and environment organization
228 /* **** PISMO SUPPORT *** */
230 /* Configure the PISMO */
231 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
232 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
234 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
236 #if defined(CONFIG_CMD_NAND)
237 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
240 /* Monitor at start of flash */
241 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
243 #define CONFIG_ENV_IS_IN_NAND 1
244 #define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */
246 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
247 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
248 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
250 #define CONFIG_SYS_CACHELINE_SIZE 64
252 #endif /* __CONFIG_H */