include/configs/omap3_overo.h

   1 /*
   2  * Configuration settings for the Gumstix Overo board.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc.
  17  */
  18
  19 #ifndef __CONFIG_H
  20 #define __CONFIG_H
  21
  22 /*
  23  * High Level Configuration Options
  24  */
  25 #define CONFIG_OMAP                             /* in a TI OMAP core */
  26 #define CONFIG_OMAP34XX                         /* which is a 34XX */
  27 #define CONFIG_OMAP3_OVERO                      /* working with overo */
  28 #define CONFIG_OMAP_GPIO
  29
  30 #define CONFIG_SDRC                             /* The chip has SDRC controller */
  31
  32 #include <asm/arch/cpu.h>                       /* get chip and board defs */
  33 #include <asm/arch/omap3.h>
  34
  35 /*
  36  * Display CPU and Board information
  37  */
  38 #define CONFIG_DISPLAY_CPUINFO
  39 #define CONFIG_DISPLAY_BOARDINFO
  40
  41 /* Clock Defines */
  42 #define V_OSCK                  26000000        /* Clock output from T2 */
  43 #define V_SCLK                  (V_OSCK >> 1)
  44
  45 #undef CONFIG_USE_IRQ                           /* no support for IRQs */
  46 #define CONFIG_MISC_INIT_R
  47
  48 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  49 #define CONFIG_SETUP_MEMORY_TAGS
  50 #define CONFIG_INITRD_TAG
  51 #define CONFIG_REVISION_TAG
  52
  53 #define CONFIG_OF_LIBFDT
  54
  55 /*
  56  * Size of malloc() pool
  57  */
  58 #define CONFIG_ENV_SIZE         (128 << 10)     /* 128 KiB */
  59                                                 /* Sector */
  60 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + (128 << 10))
  61
  62 /*
  63  * Hardware drivers
  64  */
  65
  66 /*
  67  * NS16550 Configuration
  68  */
  69 #define V_NS16550_CLK           48000000        /* 48MHz (APLL96/2) */
  70
  71 #define CONFIG_SYS_NS16550
  72 #define CONFIG_SYS_NS16550_SERIAL
  73 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  74 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  75
  76 /*
  77  * select serial console configuration
  78  */
  79 #define CONFIG_CONS_INDEX               3
  80 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  81 #define CONFIG_SERIAL3                  3
  82
  83 /* allow to overwrite serial and ethaddr */
  84 #define CONFIG_ENV_OVERWRITE
  85 #define CONFIG_BAUDRATE                 115200
  86 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
  87                                         115200}
  88 #define CONFIG_GENERIC_MMC
  89 #define CONFIG_MMC
  90 #define CONFIG_OMAP_HSMMC
  91 #define CONFIG_DOS_PARTITION
  92
  93 /* commands to include */
  94 #include <config_cmd_default.h>
  95
  96 #define CONFIG_CMD_CACHE
  97 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
  98 #define CONFIG_CMD_FAT          /* FAT support                  */
  99 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 100
 101 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 102 #define CONFIG_CMD_MMC          /* MMC support                  */
 103 #define CONFIG_CMD_NAND         /* NAND support                 */
 104
 105 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 106 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 107 #undef CONFIG_CMD_IMI           /* iminfo                       */
 108 #undef CONFIG_CMD_IMLS          /* List all found images        */
 109 #undef CONFIG_CMD_NFS           /* NFS support                  */
 110 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 111
 112 #define CONFIG_SYS_NO_FLASH
 113 #define CONFIG_HARD_I2C
 114 #define CONFIG_SYS_I2C_SPEED            100000
 115 #define CONFIG_SYS_I2C_SLAVE            1
 116 #define CONFIG_I2C_MULTI_BUS
 117 #define CONFIG_DRIVER_OMAP34XX_I2C
 118
 119 /*
 120  * TWL4030
 121  */
 122 #define CONFIG_TWL4030_POWER
 123 #define CONFIG_TWL4030_LED
 124
 125 /*
 126  * Board NAND Info.
 127  */
 128 #define CONFIG_SYS_NAND_QUIET_TEST
 129 #define CONFIG_NAND_OMAP_GPMC
 130 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 131                                                         /* to access nand */
 132 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 133                                                         /* to access nand */
 134                                                         /* at CS0 */
 135 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 136
 137 #define CONFIG_SYS_MAX_NAND_DEVICE      1       /* Max number of NAND */
 138                                                 /* devices */
 139 #define CONFIG_JFFS2_NAND
 140 /* nand device jffs2 lives on */
 141 #define CONFIG_JFFS2_DEV                "nand0"
 142 /* start of jffs2 partition */
 143 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 144 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 145                                                         /* partition */
 146
 147 /* Environment information */
 148 #define CONFIG_BOOTDELAY                5
 149
 150 #define CONFIG_EXTRA_ENV_SETTINGS \
 151         "loadaddr=0x82000000\0" \
 152         "console=ttyO2,115200n8\0" \
 153         "mpurate=500\0" \
 154         "optargs=\0" \
 155         "vram=12M\0" \
 156         "dvimode=1024x768MR-16@60\0" \
 157         "defaultdisplay=dvi\0" \
 158         "mmcdev=0\0" \
 159         "mmcroot=/dev/mmcblk0p2 rw\0" \
 160         "mmcrootfstype=ext3 rootwait\0" \
 161         "nandroot=ubi0:rootfs ubi.mtd=4\0" \
 162         "nandrootfstype=ubifs\0" \
 163         "mmcargs=setenv bootargs console=${console} " \
 164                 "${optargs} " \
 165                 "mpurate=${mpurate} " \
 166                 "vram=${vram} " \
 167                 "omapfb.mode=dvi:${dvimode} " \
 168                 "omapdss.def_disp=${defaultdisplay} " \
 169                 "root=${mmcroot} " \
 170                 "rootfstype=${mmcrootfstype}\0" \
 171         "nandargs=setenv bootargs console=${console} " \
 172                 "${optargs} " \
 173                 "mpurate=${mpurate} " \
 174                 "vram=${vram} " \
 175                 "omapfb.mode=dvi:${dvimode} " \
 176                 "omapdss.def_disp=${defaultdisplay} " \
 177                 "root=${nandroot} " \
 178                 "rootfstype=${nandrootfstype}\0" \
 179         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 180         "bootscript=echo Running bootscript from mmc ...; " \
 181                 "source ${loadaddr}\0" \
 182         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 183         "mmcboot=echo Booting from mmc ...; " \
 184                 "run mmcargs; " \
 185                 "bootm ${loadaddr}\0" \
 186         "nandboot=echo Booting from nand ...; " \
 187                 "run nandargs; " \
 188                 "nand read ${loadaddr} 280000 400000; " \
 189                 "bootm ${loadaddr}\0" \
 190
 191 #define CONFIG_BOOTCOMMAND \
 192         "if mmc rescan ${mmcdev}; then " \
 193                 "if run loadbootscript; then " \
 194                         "run bootscript; " \
 195                 "else " \
 196                         "if run loaduimage; then " \
 197                                 "run mmcboot; " \
 198                         "else run nandboot; " \
 199                         "fi; " \
 200                 "fi; " \
 201         "else run nandboot; fi"
 202
 203 #define CONFIG_AUTO_COMPLETE    1
 204 /*
 205  * Miscellaneous configurable options
 206  */
 207 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 208 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 209 #define CONFIG_SYS_PROMPT               "Overo # "
 210 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 211 /* Print Buffer Size */
 212 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 213                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 214 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 215                                                 /* args */
 216 /* Boot Argument Buffer Size */
 217 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 218 /* memtest works on */
 219 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 220 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 221                                         0x01F00000) /* 31MB */
 222
 223 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 224                                                                 /* address */
 225 /*
 226  * OMAP3 has 12 GP timers, they can be driven by the system clock
 227  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 228  * This rate is divided by a local divisor.
 229  */
 230 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 231 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 232 #define CONFIG_SYS_HZ                   1000
 233
 234 /*-----------------------------------------------------------------------
 235  * Stack sizes
 236  *
 237  * The stack sizes are set up in start.S using the settings below
 238  */
 239 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 240
 241 /*-----------------------------------------------------------------------
 242  * Physical Memory Map
 243  */
 244 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 245 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 246 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 247
 248 /*-----------------------------------------------------------------------
 249  * FLASH and environment organization
 250  */
 251
 252 /* **** PISMO SUPPORT *** */
 253
 254 /* Configure the PISMO */
 255 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 256 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 257
 258 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 259
 260 #if defined(CONFIG_CMD_NAND)
 261 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 262 #endif
 263
 264 /* Monitor at start of flash */
 265 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 266 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 267
 268 #define CONFIG_ENV_IS_IN_NAND
 269 #define ONENAND_ENV_OFFSET              0x240000 /* environment starts here */
 270 #define SMNAND_ENV_OFFSET               0x240000 /* environment starts here */
 271
 272 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 273 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 274 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 275
 276 #if defined(CONFIG_CMD_NET)
 277 /*----------------------------------------------------------------------------
 278  * SMSC9211 Ethernet from SMSC9118 family
 279  *----------------------------------------------------------------------------
 280  */
 281
 282 #define CONFIG_SMC911X
 283 #define CONFIG_SMC911X_32_BIT
 284 #define CONFIG_SMC911X_BASE             0x2C000000
 285
 286 #endif /* (CONFIG_CMD_NET) */
 287
 288 /*
 289  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
 290  * and older u-boot.bin with the new U-Boot SPL.
 291  */
 292 #define CONFIG_SYS_TEXT_BASE            0x80008000
 293 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 294 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 295 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 296 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 297                                          CONFIG_SYS_INIT_RAM_SIZE - \
 298                                          GENERATED_GBL_DATA_SIZE)
 299
 300 #define CONFIG_SYS_CACHELINE_SIZE       64
 301
 302 /* Defines for SPL */
 303 #define CONFIG_SPL
 304 #define CONFIG_SPL_NAND_SIMPLE
 305 #define CONFIG_SPL_TEXT_BASE            0x40200800
 306 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 307 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 308
 309 /* move malloc and bss high to prevent clashing with the main image */
 310 #define CONFIG_SYS_SPL_MALLOC_START     0x87000000
 311 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 312 #define CONFIG_SPL_BSS_START_ADDR       0x87080000      /* end of minimum RAM */
 313 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 314
 315 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 316 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 317 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
 318 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
 319
 320 #define CONFIG_SPL_BOARD_INIT
 321 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 322 #define CONFIG_SPL_LIBDISK_SUPPORT
 323 #define CONFIG_SPL_I2C_SUPPORT
 324 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 325 #define CONFIG_SPL_MMC_SUPPORT
 326 #define CONFIG_SPL_FAT_SUPPORT
 327 #define CONFIG_SPL_SERIAL_SUPPORT
 328 #define CONFIG_SPL_NAND_SUPPORT
 329 #define CONFIG_SPL_GPIO_SUPPORT
 330 #define CONFIG_SPL_POWER_SUPPORT
 331 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 332
 333 /* NAND boot config */
 334 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 335 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 336 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 337 #define CONFIG_SYS_NAND_OOBSIZE         64
 338 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 339 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 340 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 341                                                 10, 11, 12, 13}
 342 #define CONFIG_SYS_NAND_ECCSIZE         512
 343 #define CONFIG_SYS_NAND_ECCBYTES        3
 344 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 345 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 346
 347 #endif                          /* __CONFIG_H */