2 * Configuration settings for the Gumstix Overo board.
4 * SPDX-License-Identifier: GPL-2.0+
10 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
13 #include <configs/ti_omap3_common.h>
15 * We are only ever GP parts and will utilize all of the "downloaded image"
16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
18 #undef CONFIG_SPL_TEXT_BASE
19 #define CONFIG_SPL_TEXT_BASE 0x40200000
23 /* call misc_init_r */
24 #define CONFIG_MISC_INIT_R
26 /* pass the revision tag */
27 #define CONFIG_REVISION_TAG
29 /* override size of malloc() pool */
30 #undef CONFIG_SYS_MALLOC_LEN
31 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
32 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
33 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
37 #define CONFIG_SYS_I2C_OMAP34XX
40 #define CONFIG_TWL4030_LED
43 #define CONFIG_USB_EHCI
44 #define CONFIG_USB_EHCI_OMAP
45 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
46 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
48 /* Initialize GPIOs by default */
49 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
50 #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
51 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
52 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
53 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
55 /* commands to include */
58 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
60 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
61 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
63 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
65 /* NAND block size is 128 KiB. Synchronize these values with
66 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
67 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB
68 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
69 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
70 * linux 64 * NAND_BLOCK_SIZE = 8 MiB
73 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
74 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
80 #else /* CONFIG_NAND */
81 #define MTDPARTS_DEFAULT
82 #endif /* CONFIG_NAND */
84 /* Board NAND Info. */
85 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
87 /* Environment information */
88 #define CONFIG_EXTRA_ENV_SETTINGS \
89 DEFAULT_LINUX_BOOT_ENV \
93 "console=ttyO2,115200n8\0" \
97 "dvimode=1024x768MR-16@60\0" \
98 "defaultdisplay=dvi\0" \
100 "mmcroot=/dev/mmcblk0p2 rw\0" \
101 "mmcrootfstype=ext4 rootwait\0" \
102 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
103 "nandrootfstype=ubifs\0" \
104 "mtdparts=" MTDPARTS_DEFAULT "\0" \
105 "mmcargs=setenv bootargs console=${console} " \
107 "mpurate=${mpurate} " \
109 "omapfb.mode=dvi:${dvimode} " \
110 "omapdss.def_disp=${defaultdisplay} " \
112 "rootfstype=${mmcrootfstype}\0" \
113 "nandargs=setenv bootargs console=${console} " \
115 "mpurate=${mpurate} " \
117 "omapfb.mode=dvi:${dvimode} " \
118 "omapdss.def_disp=${defaultdisplay} " \
119 "root=${nandroot} " \
120 "rootfstype=${nandrootfstype}\0" \
121 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
122 "bootscript=echo Running boot script from mmc ...; " \
123 "source ${loadaddr}\0" \
124 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
125 "importbootenv=echo Importing environment from mmc ...; " \
126 "env import -t ${loadaddr} ${filesize}\0" \
127 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
128 "mmcboot=echo Booting from mmc...; " \
130 "bootm ${loadaddr}\0" \
131 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
132 "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
133 "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
134 "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
135 "mmcbootfdt=echo Booting with DT from mmc ...; " \
137 "bootz ${loadaddr} - ${fdtaddr}\0" \
138 "nandboot=echo Booting from nand ...; " \
140 "if nand read ${loadaddr} linux; then " \
141 "bootm ${loadaddr};" \
143 "nanddtsboot=echo Booting from nand with DTS...; " \
146 "ubifsmount ubi0:rootfs; "\
148 "run loadubizimage; "\
149 "bootz ${loadaddr} - ${fdtaddr}\0" \
151 #define CONFIG_BOOTCOMMAND \
152 "mmc dev ${mmcdev}; if mmc rescan; then " \
153 "if run loadbootscript; then " \
156 "if run loadbootenv; then " \
157 "echo Loaded environment from ${bootenv};" \
158 "run importbootenv;" \
160 "if test -n $uenvcmd; then " \
161 "echo Running uenvcmd ...;" \
164 "if run loaduimage; then " \
167 "if run loadzimage; then " \
168 "if test -z \"${fdtfile}\"; then " \
169 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
171 "if run loadfdt; then " \
177 "if test -z \"${fdtfile}\"; then "\
178 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
180 "run nanddtsboot; " \
182 /* memtest works on */
183 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
184 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
185 0x01F00000) /* 31MB */
187 /* FLASH and environment organization */
188 #if defined(CONFIG_NAND)
189 #define CONFIG_SYS_FLASH_BASE NAND_BASE
192 /* Monitor at start of flash */
193 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
194 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
196 #define CONFIG_ENV_IS_IN_NAND
197 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
198 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
200 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
201 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
202 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
204 /* Configure SMSC9211 ethernet */
205 #if defined(CONFIG_CMD_NET)
206 #define CONFIG_SMC911X
207 #define CONFIG_SMC911X_32_BIT
208 #define CONFIG_SMC911X_BASE 0x2C000000
209 #endif /* (CONFIG_CMD_NET) */
211 /* Initial RAM setup */
212 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
213 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
215 /* NAND boot config */
216 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
217 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
218 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
219 #define CONFIG_SYS_NAND_PAGE_COUNT 64
220 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
221 #define CONFIG_SYS_NAND_OOBSIZE 64
222 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
223 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
224 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
225 13, 14, 16, 17, 18, 19, 20, 21, 22, \
226 23, 24, 25, 26, 27, 28, 30, 31, 32, \
227 33, 34, 35, 36, 37, 38, 39, 40, 41, \
228 42, 44, 45, 46, 47, 48, 49, 50, 51, \
230 #define CONFIG_SYS_NAND_ECCSIZE 512
231 #define CONFIG_SYS_NAND_ECCBYTES 13
232 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
233 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
234 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
235 /* NAND: SPL falcon mode configs */
236 #ifdef CONFIG_SPL_OS_BOOT
237 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
238 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
239 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
242 #endif /* __CONFIG_H */