2 * Configuration settings for the Gumstix Overo board.
4 * SPDX-License-Identifier: GPL-2.0+
10 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
13 #include <configs/ti_omap3_common.h>
15 * We are only ever GP parts and will utilize all of the "downloaded image"
16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
18 #undef CONFIG_SPL_TEXT_BASE
19 #define CONFIG_SPL_TEXT_BASE 0x40200000
23 /* call misc_init_r */
24 #define CONFIG_MISC_INIT_R
26 /* pass the revision tag */
27 #define CONFIG_REVISION_TAG
29 /* override size of malloc() pool */
30 #undef CONFIG_SYS_MALLOC_LEN
31 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
32 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
33 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
39 #define CONFIG_TWL4030_LED
42 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
44 /* commands to include */
47 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
49 /* NAND block size is 128 KiB. Synchronize these values with
50 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
51 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB
52 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
53 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
54 * linux 64 * NAND_BLOCK_SIZE = 8 MiB
57 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
58 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
64 #else /* CONFIG_NAND */
65 #define MTDPARTS_DEFAULT
66 #endif /* CONFIG_NAND */
68 /* Board NAND Info. */
69 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
71 /* Environment information */
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73 DEFAULT_LINUX_BOOT_ENV \
77 "console=ttyO2,115200n8\0" \
81 "dvimode=1024x768MR-16@60\0" \
82 "defaultdisplay=dvi\0" \
84 "mmcroot=/dev/mmcblk0p2 rw\0" \
85 "mmcrootfstype=ext4 rootwait\0" \
86 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
87 "nandrootfstype=ubifs\0" \
88 "mtdparts=" MTDPARTS_DEFAULT "\0" \
89 "mmcargs=setenv bootargs console=${console} " \
91 "mpurate=${mpurate} " \
93 "omapfb.mode=dvi:${dvimode} " \
94 "omapdss.def_disp=${defaultdisplay} " \
96 "rootfstype=${mmcrootfstype}\0" \
97 "nandargs=setenv bootargs console=${console} " \
99 "mpurate=${mpurate} " \
101 "omapfb.mode=dvi:${dvimode} " \
102 "omapdss.def_disp=${defaultdisplay} " \
103 "root=${nandroot} " \
104 "rootfstype=${nandrootfstype}\0" \
105 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
106 "bootscript=echo Running boot script from mmc ...; " \
107 "source ${loadaddr}\0" \
108 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
109 "importbootenv=echo Importing environment from mmc ...; " \
110 "env import -t ${loadaddr} ${filesize}\0" \
111 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
112 "mmcboot=echo Booting from mmc...; " \
114 "bootm ${loadaddr}\0" \
115 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
116 "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
117 "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
118 "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
119 "mmcbootfdt=echo Booting with DT from mmc ...; " \
121 "bootz ${loadaddr} - ${fdtaddr}\0" \
122 "nandboot=echo Booting from nand ...; " \
124 "if nand read ${loadaddr} linux; then " \
125 "bootm ${loadaddr};" \
127 "nanddtsboot=echo Booting from nand with DTS...; " \
130 "ubifsmount ubi0:rootfs; "\
132 "run loadubizimage; "\
133 "bootz ${loadaddr} - ${fdtaddr}\0" \
135 #define CONFIG_BOOTCOMMAND \
136 "mmc dev ${mmcdev}; if mmc rescan; then " \
137 "if run loadbootscript; then " \
140 "if run loadbootenv; then " \
141 "echo Loaded environment from ${bootenv};" \
142 "run importbootenv;" \
144 "if test -n $uenvcmd; then " \
145 "echo Running uenvcmd ...;" \
148 "if run loaduimage; then " \
151 "if run loadzimage; then " \
152 "if test -z \"${fdtfile}\"; then " \
153 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
155 "if run loadfdt; then " \
161 "if test -z \"${fdtfile}\"; then "\
162 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
164 "run nanddtsboot; " \
166 /* memtest works on */
167 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
168 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
169 0x01F00000) /* 31MB */
171 /* FLASH and environment organization */
172 #if defined(CONFIG_NAND)
173 #define CONFIG_SYS_FLASH_BASE NAND_BASE
176 /* Monitor at start of flash */
177 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
178 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
180 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
181 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
183 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
184 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
185 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
187 /* Configure SMSC9211 ethernet */
188 #if defined(CONFIG_CMD_NET)
189 #define CONFIG_SMC911X
190 #define CONFIG_SMC911X_32_BIT
191 #define CONFIG_SMC911X_BASE 0x2C000000
192 #endif /* (CONFIG_CMD_NET) */
194 /* Initial RAM setup */
195 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
196 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
198 /* NAND boot config */
199 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
200 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
201 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
202 #define CONFIG_SYS_NAND_PAGE_COUNT 64
203 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
204 #define CONFIG_SYS_NAND_OOBSIZE 64
205 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
206 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
207 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
208 13, 14, 16, 17, 18, 19, 20, 21, 22, \
209 23, 24, 25, 26, 27, 28, 30, 31, 32, \
210 33, 34, 35, 36, 37, 38, 39, 40, 41, \
211 42, 44, 45, 46, 47, 48, 49, 50, 51, \
213 #define CONFIG_SYS_NAND_ECCSIZE 512
214 #define CONFIG_SYS_NAND_ECCBYTES 13
215 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
216 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
217 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
218 /* NAND: SPL falcon mode configs */
219 #ifdef CONFIG_SPL_OS_BOOT
220 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
221 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
224 #endif /* __CONFIG_H */