2 * Configuration settings for the Gumstix Overo board.
4 * SPDX-License-Identifier: GPL-2.0+
10 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
13 #include <configs/ti_omap3_common.h>
14 #undef CONFIG_SPL_MAX_SIZE
15 #define CONFIG_SPL_MAX_SIZE (64*1024)
16 #undef CONFIG_SPL_TEXT_BASE
17 #define CONFIG_SPL_TEXT_BASE 0x40200000
21 /* Display CPU and Board information */
22 #define CONFIG_DISPLAY_CPUINFO
23 #define CONFIG_DISPLAY_BOARDINFO
25 /* call misc_init_r */
26 #define CONFIG_MISC_INIT_R
28 /* pass the revision tag */
29 #define CONFIG_REVISION_TAG
31 /* override size of malloc() pool */
32 #undef CONFIG_SYS_MALLOC_LEN
33 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
34 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
35 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
36 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
39 #define CONFIG_SYS_I2C_OMAP34XX
42 #define CONFIG_TWL4030_LED
45 #define CONFIG_USB_EHCI
46 #define CONFIG_USB_EHCI_OMAP
47 #define CONFIG_USB_STORAGE
48 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
49 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
51 /* Initialize GPIOs by default */
52 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
53 #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
54 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
55 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
56 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
58 /* commands to include */
59 #define CONFIG_CMD_CACHE
60 #define CONFIG_CMD_USB
63 #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
64 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
66 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
67 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
69 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
71 /* NAND block size is 128 KiB. Synchronize these values with
72 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
73 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB
74 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
75 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
76 * linux 64 * NAND_BLOCK_SIZE = 8 MiB
79 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
80 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
86 #else /* CONFIG_NAND */
87 #define MTDPARTS_DEFAULT
88 #endif /* CONFIG_NAND */
90 /* Board NAND Info. */
91 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
93 /* Environment information */
94 #define CONFIG_EXTRA_ENV_SETTINGS \
95 DEFAULT_LINUX_BOOT_ENV \
99 "console=ttyO2,115200n8\0" \
103 "dvimode=1024x768MR-16@60\0" \
104 "defaultdisplay=dvi\0" \
106 "mmcroot=/dev/mmcblk0p2 rw\0" \
107 "mmcrootfstype=ext4 rootwait\0" \
108 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
109 "nandrootfstype=ubifs\0" \
110 "mtdparts=" MTDPARTS_DEFAULT "\0" \
111 "mmcargs=setenv bootargs console=${console} " \
113 "mpurate=${mpurate} " \
115 "omapfb.mode=dvi:${dvimode} " \
116 "omapdss.def_disp=${defaultdisplay} " \
118 "rootfstype=${mmcrootfstype}\0" \
119 "nandargs=setenv bootargs console=${console} " \
121 "mpurate=${mpurate} " \
123 "omapfb.mode=dvi:${dvimode} " \
124 "omapdss.def_disp=${defaultdisplay} " \
125 "root=${nandroot} " \
126 "rootfstype=${nandrootfstype}\0" \
127 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
128 "bootscript=echo Running boot script from mmc ...; " \
129 "source ${loadaddr}\0" \
130 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
131 "importbootenv=echo Importing environment from mmc ...; " \
132 "env import -t ${loadaddr} ${filesize}\0" \
133 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
134 "mmcboot=echo Booting from mmc...; " \
136 "bootm ${loadaddr}\0" \
137 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
138 "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
139 "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
140 "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
141 "mmcbootfdt=echo Booting with DT from mmc ...; " \
143 "bootz ${loadaddr} - ${fdtaddr}\0" \
144 "nandboot=echo Booting from nand ...; " \
146 "if nand read ${loadaddr} linux; then " \
147 "bootm ${loadaddr};" \
149 "nanddtsboot=echo Booting from nand with DTS...; " \
152 "ubifsmount ubi0:rootfs; "\
154 "run loadubizimage; "\
155 "bootz ${loadaddr} - ${fdtaddr}\0" \
157 #define CONFIG_BOOTCOMMAND \
158 "mmc dev ${mmcdev}; if mmc rescan; then " \
159 "if run loadbootscript; then " \
162 "if run loadbootenv; then " \
163 "echo Loaded environment from ${bootenv};" \
164 "run importbootenv;" \
166 "if test -n $uenvcmd; then " \
167 "echo Running uenvcmd ...;" \
170 "if run loaduimage; then " \
173 "if run loadzimage; then " \
174 "if test -z \"${fdtfile}\"; then " \
175 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
177 "if run loadfdt; then " \
183 "if test -z \"${fdtfile}\"; then "\
184 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
186 "run nanddtsboot; " \
188 /* memtest works on */
189 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
190 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
191 0x01F00000) /* 31MB */
193 /* FLASH and environment organization */
194 #if defined(CONFIG_NAND)
195 #define CONFIG_SYS_FLASH_BASE NAND_BASE
198 /* Monitor at start of flash */
199 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
200 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
202 #define CONFIG_ENV_IS_IN_NAND
203 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
204 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
206 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
207 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
208 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
210 /* Configure SMSC9211 ethernet */
211 #if defined(CONFIG_CMD_NET)
212 #define CONFIG_SMC911X
213 #define CONFIG_SMC911X_32_BIT
214 #define CONFIG_SMC911X_BASE 0x2C000000
215 #endif /* (CONFIG_CMD_NET) */
217 /* Initial RAM setup */
218 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
219 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
220 #define CONFIG_SYS_CACHELINE_SIZE 64
222 /* NAND boot config */
223 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
224 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
225 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
226 #define CONFIG_SYS_NAND_PAGE_COUNT 64
227 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
228 #define CONFIG_SYS_NAND_OOBSIZE 64
229 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
230 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
231 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
232 13, 14, 16, 17, 18, 19, 20, 21, 22, \
233 23, 24, 25, 26, 27, 28, 30, 31, 32, \
234 33, 34, 35, 36, 37, 38, 39, 40, 41, \
235 42, 44, 45, 46, 47, 48, 49, 50, 51, \
237 #define CONFIG_SYS_NAND_ECCSIZE 512
238 #define CONFIG_SYS_NAND_ECCBYTES 13
239 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
240 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
241 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
242 /* NAND: SPL falcon mode configs */
243 #ifdef CONFIG_SPL_OS_BOOT
244 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
245 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
246 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
249 #endif /* __CONFIG_H */