include/configs/omap3_mvblx.h

   1 /*
   2  * MATRIX VISION GmbH mvBlueLYNX-X
   3  *
   4  * Derived from omap3_beagle.h:
   5  * (C) Copyright 2006-2008
   6  * Texas Instruments.
   7  * Richard Woodruff <r-woodruff2@ti.com>
   8  * Syed Mohammed Khasim <x0khasim@ti.com>
   9  *
  10  * Configuration settings for the TI OMAP3530 Beagle board.
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #ifndef __CONFIG_H
  16 #define __CONFIG_H
  17
  18 /*
  19  * High Level Configuration Options
  20  */
  21 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  22 #define CONFIG_MVBLX            1       /* working with mvBlueLYNX-X */
  23 #define CONFIG_MACH_TYPE        MACH_TYPE_MVBLX
  24 #define CONFIG_OMAP_GPIO
  25 #define CONFIG_OMAP_COMMON
  26 /* Common ARM Erratas */
  27 #define CONFIG_ARM_ERRATA_454179
  28 #define CONFIG_ARM_ERRATA_430973
  29 #define CONFIG_ARM_ERRATA_621766
  30
  31 #define CONFIG_SDRC     /* The chip has SDRC controller */
  32
  33 #include <asm/arch/cpu.h>               /* get chip and board defs */
  34 #include <asm/arch/omap.h>
  35
  36 /*
  37  * Display CPU and Board information
  38  */
  39 #define CONFIG_DISPLAY_CPUINFO          1
  40 #define CONFIG_DISPLAY_BOARDINFO        1
  41
  42 /* Clock Defines */
  43 #define V_OSCK                  26000000        /* Clock output from T2 */
  44 #define V_SCLK                  (V_OSCK >> 1)
  45
  46 #define CONFIG_MISC_INIT_R
  47
  48 #define CONFIG_OF_LIBFDT                1
  49
  50 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  51 #define CONFIG_SETUP_MEMORY_TAGS        1
  52 #define CONFIG_INITRD_TAG               1
  53 #define CONFIG_REVISION_TAG             1
  54 #define CONFIG_SERIAL_TAG               1
  55
  56 /*
  57  * Size of malloc() pool
  58  */
  59 #define CONFIG_ENV_SIZE                 (2 << 10)       /* 2 KiB */
  60                                                 /* Sector */
  61 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  62
  63 /*
  64  * Hardware drivers
  65  */
  66
  67 /*
  68  * NS16550 Configuration
  69  */
  70 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  71
  72 #define CONFIG_SYS_NS16550
  73 #define CONFIG_SYS_NS16550_SERIAL
  74 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  75 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  76
  77 /*
  78  * select serial console configuration
  79  */
  80 #define CONFIG_CONS_INDEX               1
  81 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  82 #define CONFIG_SERIAL1                  1       /* UART1 */
  83
  84 #define CONFIG_BAUDRATE                 115200
  85 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  86                                         115200}
  87 #define CONFIG_GENERIC_MMC              1
  88 #define CONFIG_MMC                      1
  89 #define CONFIG_OMAP_HSMMC               1
  90 #define CONFIG_DOS_PARTITION            1
  91
  92 /* silent console by default */
  93 #define CONFIG_SYS_DEVICE_NULLDEV       1
  94 #define CONFIG_SILENT_CONSOLE           1
  95
  96 /* USB */
  97 #define CONFIG_MUSB_UDC                 1
  98 #define CONFIG_USB_OMAP3                1
  99 #define CONFIG_TWL4030_USB              1
 100
 101 /* USB device configuration */
 102 #define CONFIG_USB_DEVICE               1
 103 #define CONFIG_USB_TTY                  1
 104 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
 105 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1
 106 #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE 1
 107 #define CONFIG_USBD_VENDORID                    0x164c
 108 #define CONFIG_USBD_PRODUCTID_GSERIAL   0x0201
 109 #define CONFIG_USBD_PRODUCTID_CDCACM    0x0201
 110 #define CONFIG_USBD_MANUFACTURER                "MATRIX VISION GmbH"
 111 #define CONFIG_USBD_PRODUCT_NAME                "mvBlueLYNX-X"
 112
 113 /* no FLASH available */
 114 #define CONFIG_SYS_NO_FLASH
 115
 116 /* commands to include */
 117 #include <config_cmd_default.h>
 118
 119 #define CONFIG_CMD_CACHE
 120 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 121 #define CONFIG_CMD_FAT          /* FAT support                  */
 122 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 123 #define CONFIG_CMD_MMC          /* MMC support                  */
 124 #define CONFIG_CMD_EEPROM
 125 #define CONFIG_CMD_IMI          /* iminfo                       */
 126 #undef CONFIG_CMD_IMLS          /* List all found images        */
 127 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 128 #define CONFIG_CMD_NFS          /* NFS support                  */
 129 #define CONFIG_CMD_DHCP
 130 #define CONFIG_CMD_PING
 131 #define CONFIG_CMD_FPGA
 132 #define CONFIG_CMD_FPGA_LOADMK
 133
 134 #define CONFIG_SYS_I2C
 135 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 136 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 137 #define CONFIG_SYS_I2C_OMAP34XX
 138
 139 /*
 140  * TWL4030
 141  */
 142 #define CONFIG_TWL4030_POWER            1
 143
 144 /* Environment information */
 145 #undef CONFIG_ENV_OVERWRITE     /* disallow overwriting serial# and ethaddr */
 146 #define CONFIG_BOOTDELAY                0
 147 #define CONFIG_ZERO_BOOTDELAY_CHECK
 148 #define CONFIG_AUTOBOOT_KEYED
 149 #define CONFIG_AUTOBOOT_STOP_STR "S"
 150
 151 #define CONFIG_EXTRA_ENV_SETTINGS \
 152         "silent=true\0" \
 153         "loadaddr=0x82000000\0" \
 154         "usbtty=cdc_acm\0" \
 155         "console=ttyO0,115200n8\0" \
 156         "mpurate=600\0" \
 157         "vram=12M\0" \
 158         "dvimode=1024x768-24@60\0" \
 159         "defaultdisplay=dvi\0" \
 160         "loadfpga=if ext2load mmc ${mmcdev}:2 ${loadaddr} "\
 161                 "/lib/firmware/mvblx/${fpgafilename}; then " \
 162                         "fpga load 0 ${loadaddr} ${filesize}; " \
 163                 "fi;\0" \
 164         "mmcdev=0\0" \
 165         "mmcroot=/dev/mmcblk0p2 rw\0" \
 166         "mmcrootfstype=ext3 rootwait\0" \
 167         "mmcargs=setenv bootargs console=${console} " \
 168                 "mpurate=${mpurate} " \
 169                 "vram=${vram} " \
 170                 "omapfb.mode=dvi:${dvimode} " \
 171                 "omapfb.debug=y " \
 172                 "omapdss.def_disp=${defaultdisplay} " \
 173                 "root=${mmcroot} " \
 174                 "rootfstype=${mmcrootfstype} " \
 175                 "mvfw.fpgavers=${fpgavers} " \
 176                 "${cmdline_suffix}\0" \
 177         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
 178         "importbootenv=echo Importing environment from mmc ...; " \
 179                 "env import -t $loadaddr $filesize\0" \
 180         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 181         "mmcboot=echo Booting from mmc ...; " \
 182                 "run mmcargs; " \
 183                 "bootm ${loadaddr}\0" \
 184         "mmcbootcmd= " \
 185                 "echo Trying mmc${mmcdev}; " \
 186                 "mmc dev ${mmcdev}; " \
 187                 "if mmc rescan; then " \
 188                         "setenv mmcroot /dev/mmcblk${mmcdev}p2 rw; " \
 189                         "echo SD/MMC found on device ${mmcdev};" \
 190                         "if run loadbootenv; then " \
 191                            "echo Loading boot environment from mmc${mmcdev}; " \
 192                            "run importbootenv; " \
 193                         "fi;" \
 194                         "run loadfpga; " \
 195                         "if test -n $uenvcmd; then " \
 196                                 "echo Running uenvcmd ...;" \
 197                                 "run uenvcmd;" \
 198                         "fi;" \
 199                         "if run loaduimage; then " \
 200                                 "run mmcboot; " \
 201                         "fi;" \
 202                 "fi\0"
 203
 204 #define CONFIG_BOOTCOMMAND \
 205         "setenv mmcdev 1;" \
 206         "run mmcbootcmd || " \
 207         "setenv mmcdev 0;" \
 208         "run mmcbootcmd"
 209
 210
 211 #define CONFIG_AUTO_COMPLETE            1
 212 /*
 213  * Miscellaneous configurable options
 214  */
 215 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 216 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 217 #define CONFIG_SYS_PROMPT               "mvblx # "
 218 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 219 /* Print Buffer Size */
 220 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 221                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 222 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 223 /* Boot Argument Buffer Size */
 224 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 225
 226 #define CONFIG_SYS_ALT_MEMTEST      1 /* alternative memtest with looping */
 227 #define CONFIG_SYS_MEMTEST_START        (0x82000000)    /* memtest works on */
 228 #define CONFIG_SYS_MEMTEST_END          (0x9dffffff)    /* end = 448 MB */
 229 #define CONFIG_SYS_MEMTEST_SCRATCH      (0x81000000)    /* dummy address */
 230
 231 /* default load address */
 232 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 233
 234 /*
 235  * OMAP3 has 12 GP timers, they can be driven by the system clock
 236  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 237  * This rate is divided by a local divisor.
 238  */
 239 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 240 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 241
 242 /*-----------------------------------------------------------------------
 243  * Physical Memory Map
 244  */
 245 #define CONFIG_NR_DRAM_BANKS    1
 246 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 247 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 248
 249 #define CONFIG_ENV_IS_NOWHERE   1
 250
 251 /*----------------------------------------------------------------------------
 252  * Network Subsystem (SMSC9211 Ethernet from SMSC9118 family)
 253  *----------------------------------------------------------------------------
 254  */
 255 #if defined(CONFIG_CMD_NET)
 256   #define CONFIG_SMC911X                1
 257   #define CONFIG_SMC911X_32_BIT
 258   #define CONFIG_SMC911X_BASE     0x2C000000
 259 #endif /* (CONFIG_CMD_NET) */
 260
 261 #define CONFIG_FPGA_COUNT       1
 262 #define CONFIG_FPGA
 263 #define CONFIG_FPGA_ALTERA
 264 #define CONFIG_FPGA_CYCLON2
 265 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 266 #define CONFIG_SYS_FPGA_DONT_USE_CONF_DONE
 267
 268 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 0xA0>>1 */
 269 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 270 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4  /* 2^4 = 16-byte pages */
 271 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 272 #define CONFIG_SYS_EEPROM_SIZE 256 /* Bytes */
 273 #define CONFIG_ID_EEPROM
 274 #define CONFIG_SYS_EEPROM_BUS_NUM       2
 275
 276 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 277 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 278 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 279 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 280                                          CONFIG_SYS_INIT_RAM_SIZE - \
 281                                          GENERATED_GBL_DATA_SIZE)
 282
 283 #define CONFIG_OMAP3_SPI
 284
 285 #define CONFIG_SYS_CACHELINE_SIZE       64
 286
 287 #endif /* __CONFIG_H */