2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
18 #include <configs/ti_omap3_common.h>
21 * We are only ever GP parts and will utilize all of the "downloaded image"
22 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
23 * order to allow for BCH8 to fit in.
25 #undef CONFIG_SPL_TEXT_BASE
26 #define CONFIG_SPL_TEXT_BASE 0x40200000
28 #define CONFIG_BOARD_LATE_INIT
29 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
36 /* Hardware drivers */
39 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
41 #define CONFIG_USB_OMAP3
43 /* select serial console configuration */
44 #undef CONFIG_CONS_INDEX
45 #define CONFIG_CONS_INDEX 1
46 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
47 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
49 /* commands to include */
50 #define CONFIG_CMD_NAND
51 #define CONFIG_CMD_MTDPARTS
52 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
55 #define CONFIG_SYS_I2C_OMAP34XX
56 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
57 #define EXPANSION_EEPROM_I2C_BUS 2 /* I2C Bus for AT24C64 */
58 #define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
61 #define CONFIG_USB_MUSB_OMAP2PLUS
62 #define CONFIG_USB_MUSB_PIO_ONLY
63 #define CONFIG_USB_ETHER
64 #define CONFIG_USB_ETHER_RNDIS
65 #define CONFIG_USB_FUNCTION_FASTBOOT
66 #define CONFIG_CMD_FASTBOOT
67 #define CONFIG_ANDROID_BOOT_IMAGE
68 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
69 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
72 #define CONFIG_TWL4030_PWM
73 #define CONFIG_TWL4030_USB
75 /* Board NAND Info. */
77 #define CONFIG_NAND_OMAP_GPMC
79 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
80 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
81 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
83 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
85 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
87 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
88 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
89 #define CONFIG_SYS_NAND_PAGE_COUNT 64
90 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
91 #define CONFIG_SYS_NAND_OOBSIZE 64
92 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
93 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
94 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
95 13, 14, 16, 17, 18, 19, 20, 21, 22, \
96 23, 24, 25, 26, 27, 28, 30, 31, 32, \
97 33, 34, 35, 36, 37, 38, 39, 40, 41, \
98 42, 44, 45, 46, 47, 48, 49, 50, 51, \
101 #define CONFIG_SYS_NAND_ECCSIZE 512
102 #define CONFIG_SYS_NAND_ECCBYTES 13
103 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
105 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
106 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
107 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
108 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
109 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
110 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
111 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\
119 /* Environment information */
121 #define CONFIG_PREBOOT \
126 #define CONFIG_EXTRA_ENV_SETTINGS \
127 "loadaddr=0x81000000\0" \
130 "mtdids=" MTDIDS_DEFAULT "\0" \
131 "mtdparts=" MTDPARTS_DEFAULT "\0" \
133 "mmcroot=/dev/mmcblk0p2 rw\0" \
134 "mmcrootfstype=ext4 rootwait\0" \
135 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
136 "nandrootfstype=ubifs rootwait\0" \
137 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
138 "if run loadbootscript; then " \
143 "else run defaultboot; fi\0" \
144 "defaultboot=run mmcramboot\0" \
145 "consoledevice=ttyO0\0" \
147 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
148 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
150 "vrfb_arg=if itest ${rotation} -ne 0; then " \
151 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
152 "omapfb.rotate=${rotation}; " \
154 "optargs=ignore_loglevel early_printk no_console_suspend\0" \
155 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
156 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
158 "run addmtdparts; " \
160 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
161 "bootscript=echo 'Running bootscript from mmc ...'; " \
162 "source ${loadaddr}\0" \
163 "loaduimage=mmc rescan; " \
164 "fatload mmc ${mmcdev} ${loadaddr} ${uimage}\0" \
165 "loadzimage=mmc rescan; " \
166 "fatload mmc ${mmcdev} ${loadaddr} ${zimage}\0" \
167 "ramdisksize=64000\0" \
168 "ramdiskaddr=0x82000000\0" \
169 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
170 "loadramdisk=mmc rescan; " \
171 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}\0" \
172 "ramargs=run setconsole; setenv bootargs console=${console} " \
173 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
174 "mmcargs=run setconsole; setenv bootargs console=${console} " \
177 "rootfstype=${mmcrootfstype}\0" \
178 "nandargs=run setconsole; setenv bootargs console=${console} " \
180 "root=${nandroot} " \
181 "rootfstype=${nandrootfstype}\0" \
182 "nfsargs=run setconsole; setenv serverip ${tftpserver}; " \
183 "setenv bootargs console=${console} root=/dev/nfs " \
184 "nfsroot=${nfsrootpath} " \
185 "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
186 "nfsrootpath=/opt/nfs-exports/omap\0" \
188 "fdtaddr=0x86000000\0" \
189 "loadfdtimage=mmc rescan; " \
190 "fatload mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
191 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
193 "run common_bootargs; " \
194 "run dump_bootargs; " \
196 "run loadfdtimage; " \
197 "bootz ${loadaddr} - ${fdtaddr}\0" \
198 "mmcramboot=echo 'Booting uImage kernel from mmc w/ramdisk...'; " \
200 "run common_bootargs; " \
201 "run dump_bootargs; " \
203 "run loadramdisk; " \
204 "bootm ${loadaddr} ${ramdiskaddr}\0" \
205 "mmcrambootz=echo 'Booting zImage kernel from mmc w/ramdisk...'; " \
207 "run common_bootargs; " \
208 "run dump_bootargs; " \
210 "run loadramdisk; " \
211 "run loadfdtimage; " \
212 "bootz ${loadaddr} ${ramdiskaddr} ${fdtaddr};\0" \
213 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
215 "run common_bootargs; " \
216 "run dump_bootargs; " \
217 "tftpboot ${loadaddr} ${zimage}; " \
218 "tftpboot ${ramdiskaddr} ${ramdiskimage}; " \
219 "bootm ${loadaddr} ${ramdiskaddr}\0" \
220 "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
223 "run common_bootargs;" \
224 "run dump_bootargs;" \
225 "tftpboot $loadaddr zImage;" \
228 #define CONFIG_BOOTCOMMAND \
231 /* Miscellaneous configurable options */
232 #define CONFIG_AUTO_COMPLETE
234 /* memtest works on */
235 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
236 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
237 0x01F00000) /* 31MB */
239 /* FLASH and environment organization */
241 /* **** PISMO SUPPORT *** */
242 #if defined(CONFIG_CMD_NAND)
243 #define CONFIG_SYS_FLASH_BASE NAND_BASE
244 #elif defined(CONFIG_CMD_ONENAND)
245 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
248 /* Monitor at start of flash */
249 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
251 #define CONFIG_ENV_IS_IN_NAND 1
252 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
253 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
254 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
256 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
257 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
258 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
260 /* SMSC922x Ethernet */
261 #if defined(CONFIG_CMD_NET)
262 #define CONFIG_SMC911X
263 #define CONFIG_SMC911X_32_BIT
264 #define CONFIG_SMC911X_BASE 0x08000000
265 #endif /* (CONFIG_CMD_NET) */
267 /* Defines for SPL */
269 #define CONFIG_SPL_OMAP3_ID_NAND
271 /* NAND: SPL falcon mode configs */
272 #ifdef CONFIG_SPL_OS_BOOT
273 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
274 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
275 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
278 #endif /* __CONFIG_H */