2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
18 #include <configs/ti_omap3_common.h>
20 #ifdef CONFIG_SPL_BUILD
22 * Disable MMC DM for SPL build and can be re-enabled after adding
26 #undef OMAP_HSMMC_USE_GPIO
28 /* select serial console configuration for SPL */
29 #undef CONFIG_CONS_INDEX
30 #define CONFIG_CONS_INDEX 1
31 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
36 * We are only ever GP parts and will utilize all of the "downloaded image"
37 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
38 * order to allow for BCH8 to fit in.
40 #undef CONFIG_SPL_TEXT_BASE
41 #define CONFIG_SPL_FRAMEWORK
42 #define CONFIG_SPL_TEXT_BASE 0x40200000
44 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
45 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
48 #define CONFIG_REVISION_TAG
50 /* Hardware drivers */
53 #define CONFIG_OMAP3_GPIO_4 /* GPIO 96..128 is in GPIO bank 4 */
54 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
56 #define CONFIG_USB_OMAP3
58 /* commands to include */
59 #define CONFIG_CMD_NAND
60 #define CONFIG_CMD_MTDPARTS
61 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
64 #define CONFIG_SYS_I2C_OMAP34XX
65 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
68 #define CONFIG_USB_MUSB_OMAP2PLUS
69 #define CONFIG_USB_MUSB_PIO_ONLY
70 #define CONFIG_USB_ETHER
71 #define CONFIG_USB_ETHER_RNDIS
72 #define CONFIG_USB_FUNCTION_FASTBOOT
73 #define CONFIG_CMD_FASTBOOT
74 #define CONFIG_ANDROID_BOOT_IMAGE
75 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
76 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
79 #define CONFIG_TWL4030_PWM
80 #define CONFIG_TWL4030_USB
82 /* Board NAND Info. */
84 #define CONFIG_NAND_OMAP_GPMC
86 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
87 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
88 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
90 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
92 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
94 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
95 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
96 #define CONFIG_SYS_NAND_PAGE_COUNT 64
97 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
98 #define CONFIG_SYS_NAND_OOBSIZE 64
99 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
100 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
101 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
102 13, 14, 16, 17, 18, 19, 20, 21, 22, \
103 23, 24, 25, 26, 27, 28, 30, 31, 32, \
104 33, 34, 35, 36, 37, 38, 39, 40, 41, \
105 42, 44, 45, 46, 47, 48, 49, 50, 51, \
108 #define CONFIG_SYS_NAND_ECCSIZE 512
109 #define CONFIG_SYS_NAND_ECCBYTES 13
110 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
112 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
113 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
114 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
115 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
116 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
117 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
118 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\
126 /* Environment information */
128 #define CONFIG_PREBOOT \
133 #define CONFIG_EXTRA_ENV_SETTINGS \
134 DEFAULT_LINUX_BOOT_ENV \
135 "mtdids=" MTDIDS_DEFAULT "\0" \
136 "mtdparts=" MTDPARTS_DEFAULT "\0" \
138 "mmcroot=/dev/mmcblk0p2 rw\0" \
139 "mmcrootfstype=ext4 rootwait\0" \
140 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
141 "nandrootfstype=ubifs rootwait\0" \
142 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
143 "if run loadbootscript; then " \
148 "else run defaultboot; fi\0" \
149 "defaultboot=run mmcramboot\0" \
150 "consoledevice=ttyO0\0" \
151 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
152 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
154 "vrfb_arg=if itest ${rotation} -ne 0; then " \
155 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
156 "omapfb.rotate=${rotation}; " \
158 "optargs=ignore_loglevel early_printk no_console_suspend\0" \
159 "common_bootargs=run setconsole; setenv bootargs " \
161 "console=${console} " \
165 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
166 "bootscript=echo 'Running bootscript from mmc ...'; " \
167 "source ${loadaddr}\0" \
168 "loadimage=mmc rescan; " \
169 "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
170 "ramdisksize=64000\0" \
171 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
172 "loadramdisk=mmc rescan; " \
173 "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
174 "ramargs=setenv bootargs "\
175 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
176 "mmcargs=setenv bootargs "\
177 "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
178 "nandargs=setenv bootargs "\
179 "root=${nandroot} " \
180 "rootfstype=${nandrootfstype}\0" \
181 "nfsargs=setenv serverip ${tftpserver}; " \
182 "setenv bootargs root=/dev/nfs " \
183 "nfsroot=${nfsrootpath} " \
184 "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
185 "nfsrootpath=/opt/nfs-exports/omap\0" \
187 "loadfdt=mmc rescan; " \
188 "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
189 "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \
191 "run common_bootargs; " \
192 "run dump_bootargs; " \
195 "mmcbootz=setenv bootfile zImage; " \
196 "run mmcbootcommon; "\
197 "bootz ${loadaddr} - ${fdtaddr}\0" \
198 "mmcboot=setenv bootfile uImage; "\
199 "run mmcbootcommon; "\
200 "bootm ${loadaddr} - ${fdtaddr}\0" \
201 "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \
203 "run common_bootargs; " \
204 "run dump_bootargs; " \
207 "run loadramdisk\0" \
208 "mmcramboot=setenv bootfile uImage; " \
209 "run mmcrambootcommon; " \
210 "bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \
211 "mmcrambootz=setenv bootfile zImage; " \
212 "run mmcrambootcommon; " \
213 "bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \
214 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
216 "run common_bootargs; " \
217 "run dump_bootargs; " \
218 "tftpboot ${loadaddr} ${zimage}; " \
219 "tftpboot ${rdaddr} ${ramdiskimage}; " \
220 "bootm ${loadaddr} ${rdaddr}\0" \
221 "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
224 "run common_bootargs;" \
225 "run dump_bootargs;" \
226 "tftpboot $loadaddr zImage;" \
227 "bootz $loadaddr\0" \
228 "nandbootcommon=echo 'Booting kernel from NAND...';" \
231 "run common_bootargs;" \
232 "run dump_bootargs;" \
233 "nand read ${loadaddr} kernel;" \
234 "nand read ${fdtaddr} spl-os;\0" \
235 "nandbootz=run nandbootcommon; "\
236 "bootz ${loadaddr} - ${fdtaddr}\0"\
237 "nandboot=run nandbootcommon; "\
238 "bootm ${loadaddr} - ${fdtaddr}\0"\
240 #define CONFIG_BOOTCOMMAND \
243 /* Miscellaneous configurable options */
245 /* memtest works on */
246 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
247 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
248 0x01F00000) /* 31MB */
250 /* FLASH and environment organization */
252 /* **** PISMO SUPPORT *** */
253 #if defined(CONFIG_CMD_NAND)
254 #define CONFIG_SYS_FLASH_BASE NAND_BASE
257 /* Monitor at start of flash */
258 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
260 #define CONFIG_ENV_IS_IN_NAND 1
261 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
262 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
264 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
265 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
266 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
268 /* SMSC922x Ethernet */
269 #if defined(CONFIG_CMD_NET)
270 #define CONFIG_SMC911X
271 #define CONFIG_SMC911X_32_BIT
272 #define CONFIG_SMC911X_BASE 0x08000000
273 #endif /* (CONFIG_CMD_NET) */
275 /* Defines for SPL */
277 #define CONFIG_SPL_OMAP3_ID_NAND
279 /* NAND: SPL falcon mode configs */
280 #ifdef CONFIG_SPL_OS_BOOT
281 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
282 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
283 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
286 #endif /* __CONFIG_H */