2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
19 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
20 * 64 bytes before this address should be set aside for u-boot.img's
21 * header. That is 0x800FFFC0--0x80100000 should not be used for any
22 * other needs. We use this rather than the inherited defines from
23 * ti_armv7_common.h for backwards compatibility.
25 #define CONFIG_SYS_TEXT_BASE 0x80100000
26 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
27 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
28 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
29 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
31 #include <configs/ti_omap3_common.h>
34 * We are only ever GP parts and will utilize all of the "downloaded image"
35 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
36 * order to allow for BCH8 to fit in.
38 #undef CONFIG_SPL_TEXT_BASE
39 #define CONFIG_SPL_TEXT_BASE 0x40200000
41 /* Display CPU and Board information */
43 #define CONFIG_DISPLAY_CPUINFO
44 #define CONFIG_DISPLAY_BOARDINFO
45 #define CONFIG_BOARD_LATE_INIT
46 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_REVISION_TAG
51 #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
53 /* Hardware drivers */
56 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
58 #define CONFIG_USB_OMAP3
60 /* select serial console configuration */
61 #undef CONFIG_CONS_INDEX
62 #define CONFIG_CONS_INDEX 1
63 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
64 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
66 /* commands to include */
67 #define CONFIG_CMD_NAND
68 #define CONFIG_CMD_MTDPARTS
69 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
72 #define CONFIG_SYS_I2C_OMAP34XX
73 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
74 #define EXPANSION_EEPROM_I2C_BUS 2 /* I2C Bus for AT24C64 */
75 #define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
78 #define CONFIG_USB_MUSB_OMAP2PLUS
79 #define CONFIG_USB_MUSB_PIO_ONLY
80 #define CONFIG_USB_ETHER
81 #define CONFIG_USB_ETHER_RNDIS
82 #define CONFIG_USB_FUNCTION_FASTBOOT
83 #define CONFIG_CMD_FASTBOOT
84 #define CONFIG_ANDROID_BOOT_IMAGE
85 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
86 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
89 #define CONFIG_TWL4030_PWM
90 #define CONFIG_TWL4030_USB
92 /* Board NAND Info. */
94 #define CONFIG_NAND_OMAP_GPMC
96 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
97 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
98 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
100 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
102 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
104 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
105 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
106 #define CONFIG_SYS_NAND_PAGE_COUNT 64
107 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
108 #define CONFIG_SYS_NAND_OOBSIZE 64
109 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
110 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
111 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
112 13, 14, 16, 17, 18, 19, 20, 21, 22, \
113 23, 24, 25, 26, 27, 28, 30, 31, 32, \
114 33, 34, 35, 36, 37, 38, 39, 40, 41, \
115 42, 44, 45, 46, 47, 48, 49, 50, 51, \
118 #define CONFIG_SYS_NAND_ECCSIZE 512
119 #define CONFIG_SYS_NAND_ECCBYTES 13
120 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
122 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
123 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
124 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
125 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
126 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
127 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
128 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO),"\
129 "1920k(u-boot),128k(u-boot-env),"\
133 /* Environment information */
136 * PREBOOT assumes the 4.3" display is attached. User can interrupt
137 * and modify display variable to suit their needs.
139 #define CONFIG_PREBOOT \
140 "echo ======================NOTICE============================;"\
141 "echo \"The u-boot environment is not set.\";" \
142 "echo \"If using a display a valid display variable for your panel\";" \
143 "echo \"needs to be set.\";" \
144 "echo \"Valid display options are:\";" \
145 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
146 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
147 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
148 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
149 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
150 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
151 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
152 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
153 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
154 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
155 "setenv display 15;" \
160 #define CONFIG_EXTRA_ENV_SETTINGS \
161 "loadaddr=0x81000000\0" \
164 "mtdids=" MTDIDS_DEFAULT "\0" \
165 "mtdparts=" MTDPARTS_DEFAULT "\0" \
167 "mmcroot=/dev/mmcblk0p2 rw\0" \
168 "mmcrootfstype=ext4 rootwait\0" \
169 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
170 "nandrootfstype=ubifs rootwait\0" \
171 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
172 "if run loadbootscript; then " \
177 "else run defaultboot; fi\0" \
178 "defaultboot=run mmcramboot\0" \
179 "consoledevice=ttyO0\0" \
181 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
182 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
184 "vrfb_arg=if itest ${rotation} -ne 0; then " \
185 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
186 "omapfb.rotate=${rotation}; " \
188 "optargs=ignore_loglevel early_printk no_console_suspend\0" \
189 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
190 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
192 "run addmtdparts; " \
194 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
195 "bootscript=echo 'Running bootscript from mmc ...'; " \
196 "source ${loadaddr}\0" \
197 "loaduimage=mmc rescan; " \
198 "fatload mmc ${mmcdev} ${loadaddr} ${uimage}\0" \
199 "loadzimage=mmc rescan; " \
200 "fatload mmc ${mmcdev} ${loadaddr} ${zimage}\0" \
201 "ramdisksize=64000\0" \
202 "ramdiskaddr=0x82000000\0" \
203 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
204 "loadramdisk=mmc rescan; " \
205 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}\0" \
206 "ramargs=run setconsole; setenv bootargs console=${console} " \
207 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
208 "mmcargs=run setconsole; setenv bootargs console=${console} " \
211 "rootfstype=${mmcrootfstype}\0" \
212 "nandargs=run setconsole; setenv bootargs console=${console} " \
214 "root=${nandroot} " \
215 "rootfstype=${nandrootfstype}\0" \
216 "fdtaddr=0x86000000\0" \
217 "loadfdtimage=mmc rescan; " \
218 "fatload mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
219 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
221 "run common_bootargs; " \
222 "run dump_bootargs; " \
224 "run loadfdtimage; " \
225 "bootz ${loadaddr} - ${fdtaddr}\0" \
226 "mmcramboot=echo 'Booting uImage kernel from mmc w/ramdisk...'; " \
228 "run common_bootargs; " \
229 "run dump_bootargs; " \
231 "run loadramdisk; " \
232 "bootm ${loadaddr} ${ramdiskaddr}\0" \
233 "mmcrambootz=echo 'Booting zImage kernel from mmc w/ramdisk...'; " \
235 "run common_bootargs; " \
236 "run dump_bootargs; " \
238 "run loadramdisk; " \
239 "run loadfdtimage; " \
240 "bootz ${loadaddr} ${ramdiskaddr} ${fdtaddr}\0; " \
241 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
243 "run common_bootargs; " \
244 "run dump_bootargs; " \
245 "tftpboot ${loadaddr} ${uimage}; " \
246 "tftpboot ${ramdiskaddr} ${ramdiskimage}; " \
247 "bootm ${loadaddr} ${ramdiskaddr}\0"
249 #define CONFIG_BOOTCOMMAND \
252 /* Miscellaneous configurable options */
253 #define CONFIG_AUTO_COMPLETE
255 /* memtest works on */
256 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
257 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
258 0x01F00000) /* 31MB */
260 /* FLASH and environment organization */
262 /* **** PISMO SUPPORT *** */
263 #if defined(CONFIG_CMD_NAND)
264 #define CONFIG_SYS_FLASH_BASE NAND_BASE
265 #elif defined(CONFIG_CMD_ONENAND)
266 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
269 /* Monitor at start of flash */
270 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
272 #define CONFIG_ENV_IS_IN_NAND 1
273 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
274 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
275 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
277 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
278 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
279 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
281 /* SMSC922x Ethernet */
282 #if defined(CONFIG_CMD_NET)
283 #define CONFIG_SMC911X
284 #define CONFIG_SMC911X_32_BIT
285 #define CONFIG_SMC911X_BASE 0x08000000
286 #endif /* (CONFIG_CMD_NET) */
288 /* Defines for SPL */
290 #define CONFIG_SPL_OMAP3_ID_NAND
292 /* NAND: SPL falcon mode configs */
293 #ifdef CONFIG_SPL_OS_BOOT
294 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
295 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
296 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
299 #endif /* __CONFIG_H */