1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Common configuration settings for IGEP technology based boards
6 * ISEE 2007 SL, <www.iseebcn.com>
12 #include <configs/ti_omap3_common.h>
15 * We are only ever GP parts and will utilize all of the "downloaded image"
16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
18 #undef CONFIG_SPL_TEXT_BASE
19 #define CONFIG_SPL_TEXT_BASE 0x40200000
21 #define CONFIG_MISC_INIT_R
23 #define CONFIG_REVISION_TAG 1
26 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO bank 2 */
27 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO bank 4 */
30 #define PBIASLITEVMODE1 (1 << 8)
33 #define IGEP0020_GPIO_LED 27
34 #define IGEP0030_GPIO_LED 16
36 /* Board and revision detection GPIOs */
37 #define IGEP0030_USB_TRANSCEIVER_RESET 54
38 #define GPIO_IGEP00X0_BOARD_DETECTION 28
39 #define GPIO_IGEP00X0_REVISION_DETECTION 129
41 /* USB device configuration */
42 #define CONFIG_USB_DEVICE 1
43 #define CONFIG_USB_TTY 1
45 /* Change these to suit your needs */
46 #define CONFIG_USBD_VENDORID 0x0451
47 #define CONFIG_USBD_PRODUCTID 0x5678
48 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
49 #define CONFIG_USBD_PRODUCT_NAME "IGEP"
51 #ifndef CONFIG_SPL_BUILD
54 #define ENV_DEVICE_SETTINGS \
59 #define MEM_LAYOUT_SETTINGS \
60 DEFAULT_LINUX_BOOT_ENV \
61 "scriptaddr=0x87E00000\0" \
62 "pxefile_addr_r=0x87F00000\0"
64 #define BOOT_TARGET_DEVICES(func) \
67 #include <config_distro_bootcmd.h>
71 "if test ${board_name} = igep0020; then " \
72 "if test ${board_rev} = F; then " \
73 "setenv fdtfile omap3-igep0020-rev-f.dtb; " \
75 "setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
76 "if test ${board_name} = igep0030; then " \
77 "if test ${board_rev} = G; then " \
78 "setenv fdtfile omap3-igep0030-rev-g.dtb; " \
80 "setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
81 "if test ${fdtfile} = ''; then " \
82 "echo WARNING: Could not determine device tree to use; fi; \0"
84 #define CONFIG_EXTRA_ENV_SETTINGS \
92 #define CONFIG_SYS_MTDPARTS_RUNTIME
95 #define CONFIG_USE_ONENAND_BOARD_INIT
96 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
97 #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
100 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
101 #define CONFIG_SYS_NAND_PAGE_COUNT 64
102 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
103 #define CONFIG_SYS_NAND_OOBSIZE 64
104 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
105 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
106 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
107 10, 11, 12, 13, 14, 15, 16, 17, \
108 18, 19, 20, 21, 22, 23, 24, 25, \
109 26, 27, 28, 29, 30, 31, 32, 33, \
110 34, 35, 36, 37, 38, 39, 40, 41, \
111 42, 43, 44, 45, 46, 47, 48, 49, \
112 50, 51, 52, 53, 54, 55, 56, 57, }
113 #define CONFIG_SYS_NAND_ECCSIZE 512
114 #define CONFIG_SYS_NAND_ECCBYTES 14
115 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
117 /* UBI configuration */
118 #define CONFIG_SPL_UBI 1
119 #define CONFIG_SPL_UBI_MAX_VOL_LEBS 256
120 #define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024)
121 #define CONFIG_SPL_UBI_MAX_PEBS 4096
122 #define CONFIG_SPL_UBI_VOL_IDS 8
123 #define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0
124 #define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3
125 #define CONFIG_SPL_UBI_LOAD_ARGS_ID 4
126 #define CONFIG_SPL_UBI_PEB_OFFSET 4
127 #define CONFIG_SPL_UBI_VID_OFFSET 512
128 #define CONFIG_SPL_UBI_LEB_START 2048
129 #define CONFIG_SPL_UBI_INFO_ADDR 0x88080000
131 /* environment organization */
132 #define CONFIG_ENV_UBI_PART "UBI"
133 #define CONFIG_ENV_UBI_VOLUME "config"
134 #define CONFIG_ENV_UBI_VOLUME_REDUND "config_r"
135 #define CONFIG_ENV_SIZE (32*1024)
137 #endif /* __IGEP00X0_H */