2 * Configuration settings for the TI OMAP3 EVM board.
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
7 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * Manikandan Pillai <mani.pillai@ti.com>
14 * SPDX-License-Identifier: GPL-2.0+
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
23 /* ----------------------------------------------------------------------------
24 * Supported U-Boot commands
25 * ----------------------------------------------------------------------------
28 #define CONFIG_CMD_JFFS2
30 #define CONFIG_CMD_NAND
32 /* ----------------------------------------------------------------------------
33 * Supported U-Boot features
34 * ----------------------------------------------------------------------------
36 #define CONFIG_SYS_LONGHELP
38 /* Allow to overwrite serial and ethaddr */
39 #define CONFIG_ENV_OVERWRITE
41 /* Add auto-completion support */
42 #define CONFIG_AUTO_COMPLETE
44 /* ----------------------------------------------------------------------------
46 * ----------------------------------------------------------------------------
50 #define CONFIG_GENERIC_MMC
53 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
54 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
56 /* Partition tables */
57 #define CONFIG_EFI_PARTITION
61 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
62 * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
64 #define CONFIG_USB_OMAP3
65 #define CONFIG_USB_MUSB_HCD
66 /* #define CONFIG_USB_MUSB_UDC */
69 #define CONFIG_SPL_NAND_SIMPLE
70 #define CONFIG_SPL_NAND_BASE
71 #define CONFIG_SPL_NAND_DRIVERS
72 #define CONFIG_SPL_NAND_ECC
73 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
74 #define CONFIG_SYS_NAND_PAGE_COUNT 64
75 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
76 #define CONFIG_SYS_NAND_OOBSIZE 64
77 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
78 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
79 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
81 #define CONFIG_SYS_NAND_ECCSIZE 512
82 #define CONFIG_SYS_NAND_ECCBYTES 3
83 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
84 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
85 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
88 * High level configuration options
90 #define CONFIG_OMAP /* This is TI OMAP core */
91 #define CONFIG_OMAP_GPIO
92 /* Common ARM Erratas */
93 #define CONFIG_ARM_ERRATA_454179
94 #define CONFIG_ARM_ERRATA_430973
95 #define CONFIG_ARM_ERRATA_621766
97 #define CONFIG_SDRC /* The chip has SDRC controller */
99 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
100 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
103 * Clock related definitions
105 #define V_OSCK 26000000 /* Clock output from T2 */
106 #define V_SCLK (V_OSCK >> 1)
109 * OMAP3 has 12 GP timers, they can be driven by the system clock
110 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
111 * This rate is divided by a local divisor.
113 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
114 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
116 /* Size of environment - 128KB */
117 #define CONFIG_ENV_SIZE (128 << 10)
119 /* Size of malloc pool */
120 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
123 * Physical Memory Map
124 * Note 1: CS1 may or may not be populated
125 * Note 2: SDRAM size is expected to be at least 32MB
127 #define CONFIG_NR_DRAM_BANKS 2
128 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
129 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
131 /* Limits for memtest */
132 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
133 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
134 0x01F00000) /* 31MB */
136 /* Default load address */
137 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
139 /* -----------------------------------------------------------------------------
141 * -----------------------------------------------------------------------------
145 * NS16550 Configuration
147 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
149 #define CONFIG_SYS_NS16550_SERIAL
150 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
151 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
154 * select serial console configuration
156 #define CONFIG_CONS_INDEX 1
157 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
158 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
159 #define CONFIG_BAUDRATE 115200
160 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
166 #define CONFIG_SYS_I2C
167 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
168 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
169 #define CONFIG_SYS_I2C_OMAP34XX
174 /* Monitor at start of flash - Reserve 2 sectors */
175 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
177 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
179 /* Start location & size of environment */
180 #define ONENAND_ENV_OFFSET 0x260000
181 #define SMNAND_ENV_OFFSET 0x260000
183 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
188 /* Physical address to access NAND */
189 #define CONFIG_SYS_NAND_ADDR NAND_BASE
191 /* Physical address to access NAND at CS0 */
192 #define CONFIG_SYS_NAND_BASE NAND_BASE
194 /* Max number of NAND devices */
195 #define CONFIG_SYS_MAX_NAND_DEVICE 1
196 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
197 /* Timeout values (in ticks) */
198 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
199 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
201 /* Flash banks JFFS2 should use */
202 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
203 CONFIG_SYS_MAX_NAND_DEVICE)
205 #define CONFIG_SYS_JFFS2_MEM_NAND
206 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
207 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
209 #define CONFIG_JFFS2_NAND
210 /* nand device jffs2 lives on */
211 #define CONFIG_JFFS2_DEV "nand0"
212 /* Start of jffs2 partition */
213 #define CONFIG_JFFS2_PART_OFFSET 0x680000
214 /* Size of jffs2 partition */
215 #define CONFIG_JFFS2_PART_SIZE 0xf980000
220 #ifdef CONFIG_USB_OMAP3
222 #ifdef CONFIG_USB_MUSB_HCD
224 #define CONGIG_CMD_STORAGE
226 #ifdef CONFIG_USB_KEYBOARD
227 #define CONFIG_SYS_USB_EVENT_POLL
228 #define CONFIG_PREBOOT "usb start"
229 #endif /* CONFIG_USB_KEYBOARD */
231 #endif /* CONFIG_USB_MUSB_HCD */
233 #ifdef CONFIG_USB_MUSB_UDC
234 /* USB device configuration */
235 #define CONFIG_USB_DEVICE
236 #define CONFIG_USB_TTY
238 /* Change these to suit your needs */
239 #define CONFIG_USBD_VENDORID 0x0451
240 #define CONFIG_USBD_PRODUCTID 0x5678
241 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
242 #define CONFIG_USBD_PRODUCT_NAME "EVM"
243 #endif /* CONFIG_USB_MUSB_UDC */
245 #endif /* CONFIG_USB_OMAP3 */
247 /* ----------------------------------------------------------------------------
249 * ----------------------------------------------------------------------------
251 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
253 #define CONFIG_MISC_INIT_R
255 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
256 #define CONFIG_SETUP_MEMORY_TAGS
257 #define CONFIG_INITRD_TAG
258 #define CONFIG_REVISION_TAG
260 /* Size of Console IO buffer */
261 #define CONFIG_SYS_CBSIZE 512
263 /* Size of print buffer */
264 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
265 sizeof(CONFIG_SYS_PROMPT) + 16)
267 /* Size of bootarg buffer */
268 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
270 #define CONFIG_BOOTFILE "uImage"
275 #if defined(CONFIG_CMD_NAND)
276 #define CONFIG_SYS_FLASH_BASE NAND_BASE
278 #define CONFIG_NAND_OMAP_GPMC
279 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
280 #elif defined(CONFIG_CMD_ONENAND)
281 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
282 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
285 #if !defined(CONFIG_ENV_IS_NOWHERE)
286 #if defined(CONFIG_CMD_NAND)
287 #define CONFIG_ENV_IS_IN_NAND
288 #elif defined(CONFIG_CMD_ONENAND)
289 #define CONFIG_ENV_IS_IN_ONENAND
290 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
292 #endif /* CONFIG_ENV_IS_NOWHERE */
294 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
296 #if defined(CONFIG_CMD_NET)
298 /* Ethernet (SMSC9115 from SMSC9118 family) */
299 #define CONFIG_SMC911X
300 #define CONFIG_SMC911X_32_BIT
301 #define CONFIG_SMC911X_BASE 0x2C000000
304 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
305 #define CONFIG_BOOTP_GATEWAY 0x00000002
306 #define CONFIG_BOOTP_HOSTNAME 0x00000004
307 #define CONFIG_BOOTP_BOOTPATH 0x00000010
309 #endif /* CONFIG_CMD_NET */
311 /* Support for relocation */
312 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
313 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
314 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
315 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
316 CONFIG_SYS_INIT_RAM_SIZE - \
317 GENERATED_GBL_DATA_SIZE)
319 /* -----------------------------------------------------------------------------
321 * -----------------------------------------------------------------------------
323 #define CONFIG_SYS_NO_FLASH
325 /* Uncomment to define the board revision statically */
326 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
328 /* Defines for SPL */
329 #define CONFIG_SPL_FRAMEWORK
330 #define CONFIG_SPL_TEXT_BASE 0x40200800
331 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
332 CONFIG_SPL_TEXT_BASE)
334 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
335 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
337 #define CONFIG_SPL_BOARD_INIT
338 #define CONFIG_SPL_OMAP3_ID_NAND
339 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
342 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
343 * 64 bytes before this address should be set aside for u-boot.img's
344 * header. That is 0x800FFFC0--0x80100000 should not be used for any
347 #define CONFIG_SYS_TEXT_BASE 0x80100000
348 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
349 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
351 /* -----------------------------------------------------------------------------
352 * Default environment
353 * -----------------------------------------------------------------------------
356 #define CONFIG_EXTRA_ENV_SETTINGS \
357 "loadaddr=0x82000000\0" \
360 "console=ttyO0,115200n8\0" \
361 "mmcargs=setenv bootargs console=${console} " \
362 "root=/dev/mmcblk0p2 rw " \
363 "rootfstype=ext3 rootwait\0" \
364 "nandargs=setenv bootargs console=${console} " \
365 "root=/dev/mtdblock4 rw " \
366 "rootfstype=jffs2\0" \
367 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
368 "bootscript=echo Running bootscript from mmc ...; " \
369 "source ${loadaddr}\0" \
370 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
371 "mmcboot=echo Booting from mmc ...; " \
373 "bootm ${loadaddr}\0" \
374 "nandboot=echo Booting from nand ...; " \
376 "onenand read ${loadaddr} 280000 400000; " \
377 "bootm ${loadaddr}\0" \
379 #define CONFIG_BOOTCOMMAND \
380 "mmc dev ${mmcdev}; if mmc rescan; then " \
381 "if run loadbootscript; then " \
384 "if run loaduimage; then " \
386 "else run nandboot; " \
389 "else run nandboot; fi"
391 #endif /* __OMAP3EVM_CONFIG_H */