include/configs/omap3_evm.h

   1 /*
   2  * Configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * Author :
   7  *      Manikandan Pillai <mani.pillai@ti.com>
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * Manikandan Pillai <mani.pillai@ti.com>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 #ifndef __OMAP3EVM_CONFIG_H
  18 #define __OMAP3EVM_CONFIG_H
  19
  20 #include <asm/arch/cpu.h>
  21 #include <asm/arch/omap.h>
  22
  23 /* ----------------------------------------------------------------------------
  24  * Supported U-Boot commands
  25  * ----------------------------------------------------------------------------
  26  */
  27
  28 #define CONFIG_CMD_JFFS2
  29
  30 #define CONFIG_CMD_NAND
  31
  32 /* ----------------------------------------------------------------------------
  33  * Supported U-Boot features
  34  * ----------------------------------------------------------------------------
  35  */
  36 #define CONFIG_SYS_LONGHELP
  37
  38 /* Allow to overwrite serial and ethaddr */
  39 #define CONFIG_ENV_OVERWRITE
  40
  41 /* Add auto-completion support */
  42 #define CONFIG_AUTO_COMPLETE
  43
  44 /* ----------------------------------------------------------------------------
  45  * Supported hardware
  46  * ----------------------------------------------------------------------------
  47  */
  48
  49 /* SPL */
  50 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  51 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  52
  53 /* Partition tables */
  54
  55 /* USB
  56  *
  57  * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
  58  * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
  59  */
  60 #define CONFIG_USB_OMAP3
  61 #define CONFIG_USB_MUSB_HCD
  62 /* #define CONFIG_USB_MUSB_UDC */
  63
  64 /* NAND SPL */
  65 #define CONFIG_SPL_NAND_SIMPLE
  66 #define CONFIG_SPL_NAND_BASE
  67 #define CONFIG_SPL_NAND_DRIVERS
  68 #define CONFIG_SPL_NAND_ECC
  69 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  70 #define CONFIG_SYS_NAND_PAGE_COUNT      64
  71 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
  72 #define CONFIG_SYS_NAND_OOBSIZE         64
  73 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
  74 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
  75 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
  76                                                 10, 11, 12, 13}
  77 #define CONFIG_SYS_NAND_ECCSIZE         512
  78 #define CONFIG_SYS_NAND_ECCBYTES        3
  79 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
  80 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
  81 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
  82
  83 /*
  84  * High level configuration options
  85  */
  86 #define CONFIG_OMAP_GPIO
  87
  88 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  89
  90 #define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
  91
  92 /*
  93  * Clock related definitions
  94  */
  95 #define V_OSCK                  26000000        /* Clock output from T2 */
  96 #define V_SCLK                  (V_OSCK >> 1)
  97
  98 /*
  99  * OMAP3 has 12 GP timers, they can be driven by the system clock
 100  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 101  * This rate is divided by a local divisor.
 102  */
 103 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 104 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 105
 106 /* Size of environment - 128KB */
 107 #define CONFIG_ENV_SIZE                 (128 << 10)
 108
 109 /* Size of malloc pool */
 110 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
 111
 112 /*
 113  * Physical Memory Map
 114  * Note 1: CS1 may or may not be populated
 115  * Note 2: SDRAM size is expected to be at least 32MB
 116  */
 117 #define CONFIG_NR_DRAM_BANKS            2
 118 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 119 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 120
 121 /* Limits for memtest */
 122 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 123 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 124                                                 0x01F00000) /* 31MB */
 125
 126 /* Default load address */
 127 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 128
 129 /* -----------------------------------------------------------------------------
 130  * Hardware drivers
 131  * -----------------------------------------------------------------------------
 132  */
 133
 134 /*
 135  * NS16550 Configuration
 136  */
 137 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
 138
 139 #define CONFIG_SYS_NS16550_SERIAL
 140 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 141 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 142
 143 /*
 144  * select serial console configuration
 145  */
 146 #define CONFIG_CONS_INDEX               1
 147 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
 148 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
 149 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 150                                         115200}
 151
 152 /*
 153  * I2C
 154  */
 155 #define CONFIG_SYS_I2C
 156 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 157 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 158 #define CONFIG_SYS_I2C_OMAP34XX
 159
 160 /*
 161  * PISMO support
 162  */
 163 /* Monitor at start of flash - Reserve 2 sectors */
 164 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 165
 166 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 167
 168 /* Start location & size of environment */
 169 #define ONENAND_ENV_OFFSET              0x260000
 170 #define SMNAND_ENV_OFFSET               0x260000
 171
 172 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 173
 174 /*
 175  * NAND
 176  */
 177 /* Physical address to access NAND */
 178 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 179
 180 /* Physical address to access NAND at CS0 */
 181 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 182
 183 /* Max number of NAND devices */
 184 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 185 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 186 /* Timeout values (in ticks) */
 187 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 188 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 189
 190 /* Flash banks JFFS2 should use */
 191 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 192                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 193
 194 #define CONFIG_SYS_JFFS2_MEM_NAND
 195 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 196 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 197
 198 #define CONFIG_JFFS2_NAND
 199 /* nand device jffs2 lives on */
 200 #define CONFIG_JFFS2_DEV                "nand0"
 201 /* Start of jffs2 partition */
 202 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 203 /* Size of jffs2 partition */
 204 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 205
 206 /*
 207  * USB
 208  */
 209 #ifdef CONFIG_USB_OMAP3
 210
 211 #ifdef CONFIG_USB_MUSB_HCD
 212
 213 #ifdef CONFIG_USB_KEYBOARD
 214 #define CONFIG_SYS_USB_EVENT_POLL
 215 #define CONFIG_PREBOOT                  "usb start"
 216 #endif /* CONFIG_USB_KEYBOARD */
 217
 218 #endif /* CONFIG_USB_MUSB_HCD */
 219
 220 #ifdef CONFIG_USB_MUSB_UDC
 221 /* USB device configuration */
 222 #define CONFIG_USB_DEVICE
 223 #define CONFIG_USB_TTY
 224
 225 /* Change these to suit your needs */
 226 #define CONFIG_USBD_VENDORID            0x0451
 227 #define CONFIG_USBD_PRODUCTID           0x5678
 228 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 229 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 230 #endif /* CONFIG_USB_MUSB_UDC */
 231
 232 #endif /* CONFIG_USB_OMAP3 */
 233
 234 /* ----------------------------------------------------------------------------
 235  * U-Boot features
 236  * ----------------------------------------------------------------------------
 237  */
 238 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 239
 240 #define CONFIG_MISC_INIT_R
 241
 242 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 243 #define CONFIG_SETUP_MEMORY_TAGS
 244 #define CONFIG_INITRD_TAG
 245 #define CONFIG_REVISION_TAG
 246
 247 /* Size of Console IO buffer */
 248 #define CONFIG_SYS_CBSIZE               512
 249
 250 /* Size of print buffer */
 251 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 252                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 253
 254 /* Size of bootarg buffer */
 255 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 256
 257 #define CONFIG_BOOTFILE                 "uImage"
 258
 259 /*
 260  * NAND / OneNAND
 261  */
 262 #if defined(CONFIG_CMD_NAND)
 263 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 264
 265 #define CONFIG_NAND_OMAP_GPMC
 266 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 267 #elif defined(CONFIG_CMD_ONENAND)
 268 #define CONFIG_SYS_FLASH_BASE           ONENAND_MAP
 269 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 270 #endif
 271
 272 #if !defined(CONFIG_ENV_IS_NOWHERE)
 273 #if defined(CONFIG_CMD_NAND)
 274 #define CONFIG_ENV_IS_IN_NAND
 275 #elif defined(CONFIG_CMD_ONENAND)
 276 #define CONFIG_ENV_IS_IN_ONENAND
 277 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 278 #endif
 279 #endif /* CONFIG_ENV_IS_NOWHERE */
 280
 281 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 282
 283 #if defined(CONFIG_CMD_NET)
 284
 285 /* Ethernet (SMSC9115 from SMSC9118 family) */
 286 #define CONFIG_SMC911X
 287 #define CONFIG_SMC911X_32_BIT
 288 #define CONFIG_SMC911X_BASE             0x2C000000
 289
 290 /* BOOTP fields */
 291 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 292 #define CONFIG_BOOTP_GATEWAY            0x00000002
 293 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 294 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 295
 296 #endif /* CONFIG_CMD_NET */
 297
 298 /* Support for relocation */
 299 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 300 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 301 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 302 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 303                                          CONFIG_SYS_INIT_RAM_SIZE - \
 304                                          GENERATED_GBL_DATA_SIZE)
 305
 306 /* -----------------------------------------------------------------------------
 307  * Board specific
 308  * -----------------------------------------------------------------------------
 309  */
 310
 311 /* Uncomment to define the board revision statically */
 312 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 313
 314 /* Defines for SPL */
 315 #define CONFIG_SPL_FRAMEWORK
 316 #define CONFIG_SPL_TEXT_BASE            0x40200800
 317 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 318                                          CONFIG_SPL_TEXT_BASE)
 319
 320 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 321 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 322
 323 #define CONFIG_SPL_BOARD_INIT
 324 #define CONFIG_SPL_OMAP3_ID_NAND
 325 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
 326
 327 /*
 328  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 329  * 64 bytes before this address should be set aside for u-boot.img's
 330  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 331  * other needs.
 332  */
 333 #define CONFIG_SYS_TEXT_BASE            0x80100000
 334 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 335 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 336
 337 /* -----------------------------------------------------------------------------
 338  * Default environment
 339  * -----------------------------------------------------------------------------
 340  */
 341
 342 #define CONFIG_EXTRA_ENV_SETTINGS \
 343         "loadaddr=0x82000000\0" \
 344         "usbtty=cdc_acm\0" \
 345         "mmcdev=0\0" \
 346         "console=ttyO0,115200n8\0" \
 347         "mmcargs=setenv bootargs console=${console} " \
 348                 "root=/dev/mmcblk0p2 rw " \
 349                 "rootfstype=ext3 rootwait\0" \
 350         "nandargs=setenv bootargs console=${console} " \
 351                 "root=/dev/mtdblock4 rw " \
 352                 "rootfstype=jffs2\0" \
 353         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 354         "bootscript=echo Running bootscript from mmc ...; " \
 355                 "source ${loadaddr}\0" \
 356         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 357         "mmcboot=echo Booting from mmc ...; " \
 358                 "run mmcargs; " \
 359                 "bootm ${loadaddr}\0" \
 360         "nandboot=echo Booting from nand ...; " \
 361                 "run nandargs; " \
 362                 "onenand read ${loadaddr} 280000 400000; " \
 363                 "bootm ${loadaddr}\0" \
 364
 365 #define CONFIG_BOOTCOMMAND \
 366         "mmc dev ${mmcdev}; if mmc rescan; then " \
 367                 "if run loadbootscript; then " \
 368                         "run bootscript; " \
 369                 "else " \
 370                         "if run loaduimage; then " \
 371                                 "run mmcboot; " \
 372                         "else run nandboot; " \
 373                         "fi; " \
 374                 "fi; " \
 375         "else run nandboot; fi"
 376
 377 #endif /* __OMAP3EVM_CONFIG_H */