include/configs/omap3_evm.h

   1 /*
   2  * Configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * Author :
   7  *      Manikandan Pillai <mani.pillai@ti.com>
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * Manikandan Pillai <mani.pillai@ti.com>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 #ifndef __OMAP3EVM_CONFIG_H
  18 #define __OMAP3EVM_CONFIG_H
  19
  20 #include <asm/arch/cpu.h>
  21 #include <asm/arch/omap.h>
  22
  23 /* ----------------------------------------------------------------------------
  24  * Supported U-Boot commands
  25  * ----------------------------------------------------------------------------
  26  */
  27
  28 #define CONFIG_CMD_JFFS2
  29
  30 #define CONFIG_CMD_NAND
  31
  32 /* ----------------------------------------------------------------------------
  33  * Supported U-Boot features
  34  * ----------------------------------------------------------------------------
  35  */
  36 #define CONFIG_SYS_LONGHELP
  37
  38 /* Allow to overwrite serial and ethaddr */
  39 #define CONFIG_ENV_OVERWRITE
  40
  41 /* Add auto-completion support */
  42 #define CONFIG_AUTO_COMPLETE
  43
  44 /* ----------------------------------------------------------------------------
  45  * Supported hardware
  46  * ----------------------------------------------------------------------------
  47  */
  48
  49 /* SPL */
  50 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  51 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  52
  53 /* Partition tables */
  54
  55 /* USB
  56  *
  57  * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
  58  * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
  59  */
  60 #define CONFIG_USB_OMAP3
  61 #define CONFIG_USB_MUSB_HCD
  62 /* #define CONFIG_USB_MUSB_UDC */
  63
  64 /* NAND SPL */
  65 #define CONFIG_SPL_NAND_SIMPLE
  66 #define CONFIG_SPL_NAND_BASE
  67 #define CONFIG_SPL_NAND_DRIVERS
  68 #define CONFIG_SPL_NAND_ECC
  69 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  70 #define CONFIG_SYS_NAND_PAGE_COUNT      64
  71 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
  72 #define CONFIG_SYS_NAND_OOBSIZE         64
  73 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
  74 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
  75 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
  76                                                 10, 11, 12, 13}
  77 #define CONFIG_SYS_NAND_ECCSIZE         512
  78 #define CONFIG_SYS_NAND_ECCBYTES        3
  79 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
  80 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
  81 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
  82
  83 /*
  84  * High level configuration options
  85  */
  86 #define CONFIG_OMAP_GPIO
  87
  88 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  89
  90 /*
  91  * Clock related definitions
  92  */
  93 #define V_OSCK                  26000000        /* Clock output from T2 */
  94 #define V_SCLK                  (V_OSCK >> 1)
  95
  96 /*
  97  * OMAP3 has 12 GP timers, they can be driven by the system clock
  98  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  99  * This rate is divided by a local divisor.
 100  */
 101 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 102 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 103
 104 /* Size of environment - 128KB */
 105 #define CONFIG_ENV_SIZE                 (128 << 10)
 106
 107 /* Size of malloc pool */
 108 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
 109
 110 /*
 111  * Physical Memory Map
 112  * Note 1: CS1 may or may not be populated
 113  * Note 2: SDRAM size is expected to be at least 32MB
 114  */
 115 #define CONFIG_NR_DRAM_BANKS            2
 116 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 117 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 118
 119 /* Limits for memtest */
 120 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 121 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 122                                                 0x01F00000) /* 31MB */
 123
 124 /* Default load address */
 125 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 126
 127 /* -----------------------------------------------------------------------------
 128  * Hardware drivers
 129  * -----------------------------------------------------------------------------
 130  */
 131
 132 /*
 133  * NS16550 Configuration
 134  */
 135 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
 136
 137 #define CONFIG_SYS_NS16550_SERIAL
 138 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 139 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 140
 141 /*
 142  * select serial console configuration
 143  */
 144 #define CONFIG_CONS_INDEX               1
 145 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
 146 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
 147 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 148                                         115200}
 149
 150 /*
 151  * I2C
 152  */
 153 #define CONFIG_SYS_I2C
 154 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 155 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 156 #define CONFIG_SYS_I2C_OMAP34XX
 157
 158 /*
 159  * PISMO support
 160  */
 161 /* Monitor at start of flash - Reserve 2 sectors */
 162 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 163
 164 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 165
 166 /* Start location & size of environment */
 167 #define ONENAND_ENV_OFFSET              0x260000
 168 #define SMNAND_ENV_OFFSET               0x260000
 169
 170 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 171
 172 /*
 173  * NAND
 174  */
 175 /* Physical address to access NAND */
 176 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 177
 178 /* Physical address to access NAND at CS0 */
 179 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 180
 181 /* Max number of NAND devices */
 182 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 183 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 184 /* Timeout values (in ticks) */
 185 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 186 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 187
 188 /* Flash banks JFFS2 should use */
 189 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 190                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 191
 192 #define CONFIG_SYS_JFFS2_MEM_NAND
 193 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 194 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 195
 196 #define CONFIG_JFFS2_NAND
 197 /* nand device jffs2 lives on */
 198 #define CONFIG_JFFS2_DEV                "nand0"
 199 /* Start of jffs2 partition */
 200 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 201 /* Size of jffs2 partition */
 202 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 203
 204 /*
 205  * USB
 206  */
 207 #ifdef CONFIG_USB_OMAP3
 208
 209 #ifdef CONFIG_USB_MUSB_HCD
 210
 211 #ifdef CONFIG_USB_KEYBOARD
 212 #define CONFIG_SYS_USB_EVENT_POLL
 213 #define CONFIG_PREBOOT                  "usb start"
 214 #endif /* CONFIG_USB_KEYBOARD */
 215
 216 #endif /* CONFIG_USB_MUSB_HCD */
 217
 218 #ifdef CONFIG_USB_MUSB_UDC
 219 /* USB device configuration */
 220 #define CONFIG_USB_DEVICE
 221 #define CONFIG_USB_TTY
 222
 223 /* Change these to suit your needs */
 224 #define CONFIG_USBD_VENDORID            0x0451
 225 #define CONFIG_USBD_PRODUCTID           0x5678
 226 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 227 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 228 #endif /* CONFIG_USB_MUSB_UDC */
 229
 230 #endif /* CONFIG_USB_OMAP3 */
 231
 232 /* ----------------------------------------------------------------------------
 233  * U-Boot features
 234  * ----------------------------------------------------------------------------
 235  */
 236 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 237
 238 #define CONFIG_MISC_INIT_R
 239
 240 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 241 #define CONFIG_SETUP_MEMORY_TAGS
 242 #define CONFIG_INITRD_TAG
 243 #define CONFIG_REVISION_TAG
 244
 245 /* Size of Console IO buffer */
 246 #define CONFIG_SYS_CBSIZE               512
 247
 248 /* Size of print buffer */
 249 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 250                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 251
 252 /* Size of bootarg buffer */
 253 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 254
 255 #define CONFIG_BOOTFILE                 "uImage"
 256
 257 /*
 258  * NAND / OneNAND
 259  */
 260 #if defined(CONFIG_CMD_NAND)
 261 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 262
 263 #define CONFIG_NAND_OMAP_GPMC
 264 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 265 #elif defined(CONFIG_CMD_ONENAND)
 266 #define CONFIG_SYS_FLASH_BASE           ONENAND_MAP
 267 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 268 #endif
 269
 270 #if !defined(CONFIG_ENV_IS_NOWHERE)
 271 #if defined(CONFIG_CMD_NAND)
 272 #define CONFIG_ENV_IS_IN_NAND
 273 #elif defined(CONFIG_CMD_ONENAND)
 274 #define CONFIG_ENV_IS_IN_ONENAND
 275 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 276 #endif
 277 #endif /* CONFIG_ENV_IS_NOWHERE */
 278
 279 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 280
 281 #if defined(CONFIG_CMD_NET)
 282
 283 /* Ethernet (SMSC9115 from SMSC9118 family) */
 284 #define CONFIG_SMC911X
 285 #define CONFIG_SMC911X_32_BIT
 286 #define CONFIG_SMC911X_BASE             0x2C000000
 287
 288 /* BOOTP fields */
 289 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 290 #define CONFIG_BOOTP_GATEWAY            0x00000002
 291 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 292 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 293
 294 #endif /* CONFIG_CMD_NET */
 295
 296 /* Support for relocation */
 297 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 298 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 299 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 300 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 301                                          CONFIG_SYS_INIT_RAM_SIZE - \
 302                                          GENERATED_GBL_DATA_SIZE)
 303
 304 /* -----------------------------------------------------------------------------
 305  * Board specific
 306  * -----------------------------------------------------------------------------
 307  */
 308
 309 /* Uncomment to define the board revision statically */
 310 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 311
 312 /* Defines for SPL */
 313 #define CONFIG_SPL_FRAMEWORK
 314 #define CONFIG_SPL_TEXT_BASE            0x40200800
 315 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 316                                          CONFIG_SPL_TEXT_BASE)
 317
 318 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 319 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 320
 321 #define CONFIG_SPL_BOARD_INIT
 322 #define CONFIG_SPL_OMAP3_ID_NAND
 323 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
 324
 325 /*
 326  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 327  * 64 bytes before this address should be set aside for u-boot.img's
 328  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 329  * other needs.
 330  */
 331 #define CONFIG_SYS_TEXT_BASE            0x80100000
 332 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 333 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 334
 335 /* -----------------------------------------------------------------------------
 336  * Default environment
 337  * -----------------------------------------------------------------------------
 338  */
 339
 340 #define CONFIG_EXTRA_ENV_SETTINGS \
 341         "loadaddr=0x82000000\0" \
 342         "usbtty=cdc_acm\0" \
 343         "mmcdev=0\0" \
 344         "console=ttyO0,115200n8\0" \
 345         "mmcargs=setenv bootargs console=${console} " \
 346                 "root=/dev/mmcblk0p2 rw " \
 347                 "rootfstype=ext3 rootwait\0" \
 348         "nandargs=setenv bootargs console=${console} " \
 349                 "root=/dev/mtdblock4 rw " \
 350                 "rootfstype=jffs2\0" \
 351         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 352         "bootscript=echo Running bootscript from mmc ...; " \
 353                 "source ${loadaddr}\0" \
 354         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 355         "mmcboot=echo Booting from mmc ...; " \
 356                 "run mmcargs; " \
 357                 "bootm ${loadaddr}\0" \
 358         "nandboot=echo Booting from nand ...; " \
 359                 "run nandargs; " \
 360                 "onenand read ${loadaddr} 280000 400000; " \
 361                 "bootm ${loadaddr}\0" \
 362
 363 #define CONFIG_BOOTCOMMAND \
 364         "mmc dev ${mmcdev}; if mmc rescan; then " \
 365                 "if run loadbootscript; then " \
 366                         "run bootscript; " \
 367                 "else " \
 368                         "if run loaduimage; then " \
 369                                 "run mmcboot; " \
 370                         "else run nandboot; " \
 371                         "fi; " \
 372                 "fi; " \
 373         "else run nandboot; fi"
 374
 375 #endif /* __OMAP3EVM_CONFIG_H */