Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
[platform/kernel/u-boot.git] / include / configs / omap3_evm.h
1 /*
2  * Configuration settings for the TI OMAP3 EVM board.
3  *
4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * Author :
7  *      Manikandan Pillai <mani.pillai@ti.com>
8  * Derived from Beagle Board and 3430 SDP code by
9  *      Richard Woodruff <r-woodruff2@ti.com>
10  *      Syed Mohammed Khasim <khasim@ti.com>
11  *
12  * Manikandan Pillai <mani.pillai@ti.com>
13  *
14  * SPDX-License-Identifier:     GPL-2.0+
15  */
16
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
19
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
22
23 /* ----------------------------------------------------------------------------
24  * Supported U-Boot commands
25  * ----------------------------------------------------------------------------
26  */
27
28 #define CONFIG_CMD_NAND
29
30 /* ----------------------------------------------------------------------------
31  * Supported U-Boot features
32  * ----------------------------------------------------------------------------
33  */
34 #define CONFIG_SYS_LONGHELP
35
36 /* Allow to overwrite serial and ethaddr */
37 #define CONFIG_ENV_OVERWRITE
38
39 /* Add auto-completion support */
40 #define CONFIG_AUTO_COMPLETE
41
42 /* ----------------------------------------------------------------------------
43  * Supported hardware
44  * ----------------------------------------------------------------------------
45  */
46
47 /* SPL */
48 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
49 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
50
51 /* Partition tables */
52
53 /* USB
54  *
55  * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
56  * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
57  */
58 #define CONFIG_USB_OMAP3
59 #define CONFIG_USB_MUSB_HCD
60 /* #define CONFIG_USB_MUSB_UDC */
61
62 /* NAND SPL */
63 #define CONFIG_SPL_NAND_SIMPLE
64 #define CONFIG_SPL_NAND_BASE
65 #define CONFIG_SPL_NAND_DRIVERS
66 #define CONFIG_SPL_NAND_ECC
67 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
68 #define CONFIG_SYS_NAND_PAGE_COUNT      64
69 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
70 #define CONFIG_SYS_NAND_OOBSIZE         64
71 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
72 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
73 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
74                                                 10, 11, 12, 13}
75 #define CONFIG_SYS_NAND_ECCSIZE         512
76 #define CONFIG_SYS_NAND_ECCBYTES        3
77 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
78 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
79 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
80
81 /*
82  * High level configuration options
83  */
84
85 #define CONFIG_SDRC                     /* The chip has SDRC controller */
86
87 /*
88  * Clock related definitions
89  */
90 #define V_OSCK                  26000000        /* Clock output from T2 */
91 #define V_SCLK                  (V_OSCK >> 1)
92
93 /*
94  * OMAP3 has 12 GP timers, they can be driven by the system clock
95  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
96  * This rate is divided by a local divisor.
97  */
98 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
99 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
100
101 /* Size of environment - 128KB */
102 #define CONFIG_ENV_SIZE                 (128 << 10)
103
104 /* Size of malloc pool */
105 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
106
107 /*
108  * Physical Memory Map
109  * Note 1: CS1 may or may not be populated
110  * Note 2: SDRAM size is expected to be at least 32MB
111  */
112 #define CONFIG_NR_DRAM_BANKS            2
113 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
114 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
115
116 /* Limits for memtest */
117 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
118 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
119                                                 0x01F00000) /* 31MB */
120
121 /* Default load address */
122 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
123
124 /* -----------------------------------------------------------------------------
125  * Hardware drivers
126  * -----------------------------------------------------------------------------
127  */
128
129 /*
130  * NS16550 Configuration
131  */
132 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
133
134 #define CONFIG_SYS_NS16550_SERIAL
135 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
136 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
137
138 /*
139  * select serial console configuration
140  */
141 #define CONFIG_CONS_INDEX               1
142 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
143 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
144 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
145                                         115200}
146
147 /*
148  * I2C
149  */
150 #define CONFIG_SYS_I2C
151 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
152 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
153 #define CONFIG_SYS_I2C_OMAP34XX
154
155 /*
156  * PISMO support
157  */
158 /* Monitor at start of flash - Reserve 2 sectors */
159 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
160
161 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
162
163 /* Start location & size of environment */
164 #define ONENAND_ENV_OFFSET              0x260000
165 #define SMNAND_ENV_OFFSET               0x260000
166
167 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
168
169 /*
170  * NAND
171  */
172 /* Physical address to access NAND */
173 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
174
175 /* Physical address to access NAND at CS0 */
176 #define CONFIG_SYS_NAND_BASE            NAND_BASE
177
178 /* Max number of NAND devices */
179 #define CONFIG_SYS_MAX_NAND_DEVICE      1
180 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
181 /* Timeout values (in ticks) */
182 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
183 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
184
185 /* Flash banks JFFS2 should use */
186 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
187                                                 CONFIG_SYS_MAX_NAND_DEVICE)
188
189 #define CONFIG_SYS_JFFS2_MEM_NAND
190 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
191 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
192
193 #define CONFIG_JFFS2_NAND
194 /* nand device jffs2 lives on */
195 #define CONFIG_JFFS2_DEV                "nand0"
196 /* Start of jffs2 partition */
197 #define CONFIG_JFFS2_PART_OFFSET        0x680000
198 /* Size of jffs2 partition */
199 #define CONFIG_JFFS2_PART_SIZE          0xf980000
200
201 /*
202  * USB
203  */
204 #ifdef CONFIG_USB_OMAP3
205
206 #ifdef CONFIG_USB_MUSB_HCD
207
208 #ifdef CONFIG_USB_KEYBOARD
209 #define CONFIG_SYS_USB_EVENT_POLL
210 #define CONFIG_PREBOOT                  "usb start"
211 #endif /* CONFIG_USB_KEYBOARD */
212
213 #endif /* CONFIG_USB_MUSB_HCD */
214
215 #ifdef CONFIG_USB_MUSB_UDC
216 /* USB device configuration */
217 #define CONFIG_USB_DEVICE
218 #define CONFIG_USB_TTY
219
220 /* Change these to suit your needs */
221 #define CONFIG_USBD_VENDORID            0x0451
222 #define CONFIG_USBD_PRODUCTID           0x5678
223 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
224 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
225 #endif /* CONFIG_USB_MUSB_UDC */
226
227 #endif /* CONFIG_USB_OMAP3 */
228
229 /* ----------------------------------------------------------------------------
230  * U-Boot features
231  * ----------------------------------------------------------------------------
232  */
233 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
234
235 #define CONFIG_MISC_INIT_R
236
237 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
238 #define CONFIG_SETUP_MEMORY_TAGS
239 #define CONFIG_INITRD_TAG
240 #define CONFIG_REVISION_TAG
241
242 /* Size of Console IO buffer */
243 #define CONFIG_SYS_CBSIZE               512
244
245 /* Size of print buffer */
246 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
247                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
248
249 /* Size of bootarg buffer */
250 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
251
252 #define CONFIG_BOOTFILE                 "uImage"
253
254 /*
255  * NAND / OneNAND
256  */
257 #if defined(CONFIG_CMD_NAND)
258 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
259
260 #define CONFIG_NAND_OMAP_GPMC
261 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
262 #elif defined(CONFIG_CMD_ONENAND)
263 #define CONFIG_SYS_FLASH_BASE           ONENAND_MAP
264 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
265 #endif
266
267 #if !defined(CONFIG_ENV_IS_NOWHERE)
268 #if defined(CONFIG_CMD_NAND)
269 #elif defined(CONFIG_CMD_ONENAND)
270 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
271 #endif
272 #endif /* CONFIG_ENV_IS_NOWHERE */
273
274 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
275
276 #if defined(CONFIG_CMD_NET)
277
278 /* Ethernet (SMSC9115 from SMSC9118 family) */
279 #define CONFIG_SMC911X
280 #define CONFIG_SMC911X_32_BIT
281 #define CONFIG_SMC911X_BASE             0x2C000000
282
283 /* BOOTP fields */
284 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
285 #define CONFIG_BOOTP_GATEWAY            0x00000002
286 #define CONFIG_BOOTP_HOSTNAME           0x00000004
287 #define CONFIG_BOOTP_BOOTPATH           0x00000010
288
289 #endif /* CONFIG_CMD_NET */
290
291 /* Support for relocation */
292 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
293 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
294 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
295 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
296                                          CONFIG_SYS_INIT_RAM_SIZE - \
297                                          GENERATED_GBL_DATA_SIZE)
298
299 /* -----------------------------------------------------------------------------
300  * Board specific
301  * -----------------------------------------------------------------------------
302  */
303
304 /* Uncomment to define the board revision statically */
305 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
306
307 /* Defines for SPL */
308 #define CONFIG_SPL_FRAMEWORK
309 #define CONFIG_SPL_TEXT_BASE            0x40200800
310 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
311                                          CONFIG_SPL_TEXT_BASE)
312
313 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
314 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
315
316 #define CONFIG_SPL_OMAP3_ID_NAND
317 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
318
319 /*
320  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
321  * 64 bytes before this address should be set aside for u-boot.img's
322  * header. That is 0x800FFFC0--0x80100000 should not be used for any
323  * other needs.
324  */
325 #define CONFIG_SYS_TEXT_BASE            0x80100000
326 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
327 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
328
329 /* -----------------------------------------------------------------------------
330  * Default environment
331  * -----------------------------------------------------------------------------
332  */
333
334 #define CONFIG_EXTRA_ENV_SETTINGS \
335         "loadaddr=0x82000000\0" \
336         "usbtty=cdc_acm\0" \
337         "mmcdev=0\0" \
338         "console=ttyO0,115200n8\0" \
339         "mmcargs=setenv bootargs console=${console} " \
340                 "root=/dev/mmcblk0p2 rw " \
341                 "rootfstype=ext3 rootwait\0" \
342         "nandargs=setenv bootargs console=${console} " \
343                 "root=/dev/mtdblock4 rw " \
344                 "rootfstype=jffs2\0" \
345         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
346         "bootscript=echo Running bootscript from mmc ...; " \
347                 "source ${loadaddr}\0" \
348         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
349         "mmcboot=echo Booting from mmc ...; " \
350                 "run mmcargs; " \
351                 "bootm ${loadaddr}\0" \
352         "nandboot=echo Booting from nand ...; " \
353                 "run nandargs; " \
354                 "onenand read ${loadaddr} 280000 400000; " \
355                 "bootm ${loadaddr}\0" \
356
357 #define CONFIG_BOOTCOMMAND \
358         "mmc dev ${mmcdev}; if mmc rescan; then " \
359                 "if run loadbootscript; then " \
360                         "run bootscript; " \
361                 "else " \
362                         "if run loaduimage; then " \
363                                 "run mmcboot; " \
364                         "else run nandboot; " \
365                         "fi; " \
366                 "fi; " \
367         "else run nandboot; fi"
368
369 #endif /* __OMAP3EVM_CONFIG_H */