include/configs/omap3_evm.h

   1 /*
   2  * Configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * Author :
   7  *      Manikandan Pillai <mani.pillai@ti.com>
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * Manikandan Pillai <mani.pillai@ti.com>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 #ifndef __OMAP3EVM_CONFIG_H
  18 #define __OMAP3EVM_CONFIG_H
  19
  20 #include <asm/arch/cpu.h>
  21 #include <asm/arch/omap.h>
  22
  23 /* ----------------------------------------------------------------------------
  24  * Supported U-Boot commands
  25  * ----------------------------------------------------------------------------
  26  */
  27
  28 #define CONFIG_CMD_JFFS2
  29
  30 #define CONFIG_CMD_NAND
  31
  32 /* ----------------------------------------------------------------------------
  33  * Supported U-Boot features
  34  * ----------------------------------------------------------------------------
  35  */
  36 #define CONFIG_SYS_LONGHELP
  37
  38 /* Display CPU and Board information */
  39 #define CONFIG_DISPLAY_CPUINFO
  40 #define CONFIG_DISPLAY_BOARDINFO
  41
  42 /* Allow to overwrite serial and ethaddr */
  43 #define CONFIG_ENV_OVERWRITE
  44
  45 /* Add auto-completion support */
  46 #define CONFIG_AUTO_COMPLETE
  47
  48 /* ----------------------------------------------------------------------------
  49  * Supported hardware
  50  * ----------------------------------------------------------------------------
  51  */
  52
  53 /* MMC */
  54 #define CONFIG_MMC
  55 #define CONFIG_GENERIC_MMC
  56 #define CONFIG_OMAP_HSMMC
  57
  58 /* SPL */
  59 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
  60 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
  61 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  62 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  63
  64 /* Partition tables */
  65 #define CONFIG_EFI_PARTITION
  66 #define CONFIG_DOS_PARTITION
  67
  68 /* USB
  69  *
  70  * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
  71  * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
  72  */
  73 #define CONFIG_USB_OMAP3
  74 #define CONFIG_USB_MUSB_HCD
  75 /* #define CONFIG_USB_MUSB_UDC */
  76
  77 /* NAND SPL */
  78 #define CONFIG_SPL_NAND_SIMPLE
  79 #define CONFIG_SPL_NAND_SUPPORT
  80 #define CONFIG_SPL_NAND_BASE
  81 #define CONFIG_SPL_NAND_DRIVERS
  82 #define CONFIG_SPL_NAND_ECC
  83 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  84 #define CONFIG_SYS_NAND_PAGE_COUNT      64
  85 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
  86 #define CONFIG_SYS_NAND_OOBSIZE         64
  87 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
  88 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
  89 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
  90                                                 10, 11, 12, 13}
  91 #define CONFIG_SYS_NAND_ECCSIZE         512
  92 #define CONFIG_SYS_NAND_ECCBYTES        3
  93 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
  94 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
  95 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
  96
  97 /*
  98  * High level configuration options
  99  */
 100 #define CONFIG_OMAP                     /* This is TI OMAP core */
 101 #define CONFIG_OMAP_GPIO
 102 #define CONFIG_OMAP_COMMON
 103 /* Common ARM Erratas */
 104 #define CONFIG_ARM_ERRATA_454179
 105 #define CONFIG_ARM_ERRATA_430973
 106 #define CONFIG_ARM_ERRATA_621766
 107
 108 #define CONFIG_SDRC                     /* The chip has SDRC controller */
 109
 110 #define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
 111 #define CONFIG_TWL4030_POWER            /* with TWL4030 PMIC */
 112
 113 /*
 114  * Clock related definitions
 115  */
 116 #define V_OSCK                  26000000        /* Clock output from T2 */
 117 #define V_SCLK                  (V_OSCK >> 1)
 118
 119 /*
 120  * OMAP3 has 12 GP timers, they can be driven by the system clock
 121  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 122  * This rate is divided by a local divisor.
 123  */
 124 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 125 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 126
 127 /* Size of environment - 128KB */
 128 #define CONFIG_ENV_SIZE                 (128 << 10)
 129
 130 /* Size of malloc pool */
 131 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
 132
 133 /*
 134  * Physical Memory Map
 135  * Note 1: CS1 may or may not be populated
 136  * Note 2: SDRAM size is expected to be at least 32MB
 137  */
 138 #define CONFIG_NR_DRAM_BANKS            2
 139 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 140 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 141
 142 /* Limits for memtest */
 143 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 144 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 145                                                 0x01F00000) /* 31MB */
 146
 147 /* Default load address */
 148 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 149
 150 /* -----------------------------------------------------------------------------
 151  * Hardware drivers
 152  * -----------------------------------------------------------------------------
 153  */
 154
 155 /*
 156  * NS16550 Configuration
 157  */
 158 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
 159
 160 #define CONFIG_SYS_NS16550_SERIAL
 161 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 162 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
 163
 164 /*
 165  * select serial console configuration
 166  */
 167 #define CONFIG_CONS_INDEX               1
 168 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
 169 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
 170 #define CONFIG_BAUDRATE                 115200
 171 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 172                                         115200}
 173
 174 /*
 175  * I2C
 176  */
 177 #define CONFIG_SYS_I2C
 178 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 179 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 180 #define CONFIG_SYS_I2C_OMAP34XX
 181
 182 /*
 183  * PISMO support
 184  */
 185 /* Monitor at start of flash - Reserve 2 sectors */
 186 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 187
 188 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 189
 190 /* Start location & size of environment */
 191 #define ONENAND_ENV_OFFSET              0x260000
 192 #define SMNAND_ENV_OFFSET               0x260000
 193
 194 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 195
 196 /*
 197  * NAND
 198  */
 199 /* Physical address to access NAND */
 200 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 201
 202 /* Physical address to access NAND at CS0 */
 203 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 204
 205 /* Max number of NAND devices */
 206 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 207 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 208 /* Timeout values (in ticks) */
 209 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 210 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 211
 212 /* Flash banks JFFS2 should use */
 213 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 214                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 215
 216 #define CONFIG_SYS_JFFS2_MEM_NAND
 217 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 218 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 219
 220 #define CONFIG_JFFS2_NAND
 221 /* nand device jffs2 lives on */
 222 #define CONFIG_JFFS2_DEV                "nand0"
 223 /* Start of jffs2 partition */
 224 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 225 /* Size of jffs2 partition */
 226 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 227
 228 /*
 229  * USB
 230  */
 231 #ifdef CONFIG_USB_OMAP3
 232
 233 #ifdef CONFIG_USB_MUSB_HCD
 234
 235 #define CONGIG_CMD_STORAGE
 236
 237 #ifdef CONFIG_USB_KEYBOARD
 238 #define CONFIG_SYS_USB_EVENT_POLL
 239 #define CONFIG_PREBOOT                  "usb start"
 240 #endif /* CONFIG_USB_KEYBOARD */
 241
 242 #endif /* CONFIG_USB_MUSB_HCD */
 243
 244 #ifdef CONFIG_USB_MUSB_UDC
 245 /* USB device configuration */
 246 #define CONFIG_USB_DEVICE
 247 #define CONFIG_USB_TTY
 248 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 249
 250 /* Change these to suit your needs */
 251 #define CONFIG_USBD_VENDORID            0x0451
 252 #define CONFIG_USBD_PRODUCTID           0x5678
 253 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 254 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 255 #endif /* CONFIG_USB_MUSB_UDC */
 256
 257 #endif /* CONFIG_USB_OMAP3 */
 258
 259 /* ----------------------------------------------------------------------------
 260  * U-Boot features
 261  * ----------------------------------------------------------------------------
 262  */
 263 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 264
 265 #define CONFIG_MISC_INIT_R
 266
 267 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 268 #define CONFIG_SETUP_MEMORY_TAGS
 269 #define CONFIG_INITRD_TAG
 270 #define CONFIG_REVISION_TAG
 271
 272 /* Size of Console IO buffer */
 273 #define CONFIG_SYS_CBSIZE               512
 274
 275 /* Size of print buffer */
 276 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 277                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 278
 279 /* Size of bootarg buffer */
 280 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 281
 282 #define CONFIG_BOOTFILE                 "uImage"
 283
 284 /*
 285  * NAND / OneNAND
 286  */
 287 #if defined(CONFIG_CMD_NAND)
 288 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 289
 290 #define CONFIG_NAND_OMAP_GPMC
 291 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 292 #elif defined(CONFIG_CMD_ONENAND)
 293 #define CONFIG_SYS_FLASH_BASE           ONENAND_MAP
 294 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 295 #endif
 296
 297 #if !defined(CONFIG_ENV_IS_NOWHERE)
 298 #if defined(CONFIG_CMD_NAND)
 299 #define CONFIG_ENV_IS_IN_NAND
 300 #elif defined(CONFIG_CMD_ONENAND)
 301 #define CONFIG_ENV_IS_IN_ONENAND
 302 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 303 #endif
 304 #endif /* CONFIG_ENV_IS_NOWHERE */
 305
 306 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 307
 308 #if defined(CONFIG_CMD_NET)
 309
 310 /* Ethernet (SMSC9115 from SMSC9118 family) */
 311 #define CONFIG_SMC911X
 312 #define CONFIG_SMC911X_32_BIT
 313 #define CONFIG_SMC911X_BASE             0x2C000000
 314
 315 /* BOOTP fields */
 316 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 317 #define CONFIG_BOOTP_GATEWAY            0x00000002
 318 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 319 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 320
 321 #endif /* CONFIG_CMD_NET */
 322
 323 /* Support for relocation */
 324 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 325 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 326 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 327 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 328                                          CONFIG_SYS_INIT_RAM_SIZE - \
 329                                          GENERATED_GBL_DATA_SIZE)
 330
 331 /* -----------------------------------------------------------------------------
 332  * Board specific
 333  * -----------------------------------------------------------------------------
 334  */
 335 #define CONFIG_SYS_NO_FLASH
 336
 337 /* Uncomment to define the board revision statically */
 338 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 339
 340 /* Defines for SPL */
 341 #define CONFIG_SPL_FRAMEWORK
 342 #define CONFIG_SPL_TEXT_BASE            0x40200800
 343 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 344                                          CONFIG_SPL_TEXT_BASE)
 345
 346 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 347 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 348
 349 #define CONFIG_SPL_BOARD_INIT
 350 #define CONFIG_SPL_SERIAL_SUPPORT
 351 #define CONFIG_SPL_POWER_SUPPORT
 352 #define CONFIG_SPL_OMAP3_ID_NAND
 353 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 354
 355 /*
 356  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 357  * 64 bytes before this address should be set aside for u-boot.img's
 358  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 359  * other needs.
 360  */
 361 #define CONFIG_SYS_TEXT_BASE            0x80100000
 362 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 363 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 364
 365 /* -----------------------------------------------------------------------------
 366  * Default environment
 367  * -----------------------------------------------------------------------------
 368  */
 369
 370 #define CONFIG_EXTRA_ENV_SETTINGS \
 371         "loadaddr=0x82000000\0" \
 372         "usbtty=cdc_acm\0" \
 373         "mmcdev=0\0" \
 374         "console=ttyO0,115200n8\0" \
 375         "mmcargs=setenv bootargs console=${console} " \
 376                 "root=/dev/mmcblk0p2 rw " \
 377                 "rootfstype=ext3 rootwait\0" \
 378         "nandargs=setenv bootargs console=${console} " \
 379                 "root=/dev/mtdblock4 rw " \
 380                 "rootfstype=jffs2\0" \
 381         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 382         "bootscript=echo Running bootscript from mmc ...; " \
 383                 "source ${loadaddr}\0" \
 384         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 385         "mmcboot=echo Booting from mmc ...; " \
 386                 "run mmcargs; " \
 387                 "bootm ${loadaddr}\0" \
 388         "nandboot=echo Booting from nand ...; " \
 389                 "run nandargs; " \
 390                 "onenand read ${loadaddr} 280000 400000; " \
 391                 "bootm ${loadaddr}\0" \
 392
 393 #define CONFIG_BOOTCOMMAND \
 394         "mmc dev ${mmcdev}; if mmc rescan; then " \
 395                 "if run loadbootscript; then " \
 396                         "run bootscript; " \
 397                 "else " \
 398                         "if run loaduimage; then " \
 399                                 "run mmcboot; " \
 400                         "else run nandboot; " \
 401                         "fi; " \
 402                 "fi; " \
 403         "else run nandboot; fi"
 404
 405 #endif /* __OMAP3EVM_CONFIG_H */