2 * Configuration settings for the TI OMAP3 EVM board.
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
7 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * Manikandan Pillai <mani.pillai@ti.com>
14 * SPDX-License-Identifier: GPL-2.0+
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
23 /* ----------------------------------------------------------------------------
24 * Supported U-Boot commands
25 * ----------------------------------------------------------------------------
28 #define CONFIG_CMD_JFFS2
30 #define CONFIG_CMD_NAND
32 /* ----------------------------------------------------------------------------
33 * Supported U-Boot features
34 * ----------------------------------------------------------------------------
36 #define CONFIG_SYS_LONGHELP
38 /* Allow to overwrite serial and ethaddr */
39 #define CONFIG_ENV_OVERWRITE
41 /* Add auto-completion support */
42 #define CONFIG_AUTO_COMPLETE
44 /* ----------------------------------------------------------------------------
46 * ----------------------------------------------------------------------------
51 #define CONFIG_GENERIC_MMC
52 #define CONFIG_OMAP_HSMMC
55 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
56 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
57 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
58 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
60 /* Partition tables */
61 #define CONFIG_EFI_PARTITION
62 #define CONFIG_DOS_PARTITION
66 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
67 * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
69 #define CONFIG_USB_OMAP3
70 #define CONFIG_USB_MUSB_HCD
71 /* #define CONFIG_USB_MUSB_UDC */
74 #define CONFIG_SPL_NAND_SIMPLE
75 #define CONFIG_SPL_NAND_BASE
76 #define CONFIG_SPL_NAND_DRIVERS
77 #define CONFIG_SPL_NAND_ECC
78 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
79 #define CONFIG_SYS_NAND_PAGE_COUNT 64
80 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
81 #define CONFIG_SYS_NAND_OOBSIZE 64
82 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
83 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
84 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
86 #define CONFIG_SYS_NAND_ECCSIZE 512
87 #define CONFIG_SYS_NAND_ECCBYTES 3
88 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
89 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
90 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
93 * High level configuration options
95 #define CONFIG_OMAP /* This is TI OMAP core */
96 #define CONFIG_OMAP_GPIO
97 #define CONFIG_OMAP_COMMON
98 /* Common ARM Erratas */
99 #define CONFIG_ARM_ERRATA_454179
100 #define CONFIG_ARM_ERRATA_430973
101 #define CONFIG_ARM_ERRATA_621766
103 #define CONFIG_SDRC /* The chip has SDRC controller */
105 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
106 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
109 * Clock related definitions
111 #define V_OSCK 26000000 /* Clock output from T2 */
112 #define V_SCLK (V_OSCK >> 1)
115 * OMAP3 has 12 GP timers, they can be driven by the system clock
116 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
117 * This rate is divided by a local divisor.
119 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
120 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
122 /* Size of environment - 128KB */
123 #define CONFIG_ENV_SIZE (128 << 10)
125 /* Size of malloc pool */
126 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
129 * Physical Memory Map
130 * Note 1: CS1 may or may not be populated
131 * Note 2: SDRAM size is expected to be at least 32MB
133 #define CONFIG_NR_DRAM_BANKS 2
134 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
135 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
137 /* Limits for memtest */
138 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
139 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
140 0x01F00000) /* 31MB */
142 /* Default load address */
143 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
145 /* -----------------------------------------------------------------------------
147 * -----------------------------------------------------------------------------
151 * NS16550 Configuration
153 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
155 #define CONFIG_SYS_NS16550_SERIAL
156 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
157 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
160 * select serial console configuration
162 #define CONFIG_CONS_INDEX 1
163 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
164 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
165 #define CONFIG_BAUDRATE 115200
166 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
172 #define CONFIG_SYS_I2C
173 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
174 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
175 #define CONFIG_SYS_I2C_OMAP34XX
180 /* Monitor at start of flash - Reserve 2 sectors */
181 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
183 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
185 /* Start location & size of environment */
186 #define ONENAND_ENV_OFFSET 0x260000
187 #define SMNAND_ENV_OFFSET 0x260000
189 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
194 /* Physical address to access NAND */
195 #define CONFIG_SYS_NAND_ADDR NAND_BASE
197 /* Physical address to access NAND at CS0 */
198 #define CONFIG_SYS_NAND_BASE NAND_BASE
200 /* Max number of NAND devices */
201 #define CONFIG_SYS_MAX_NAND_DEVICE 1
202 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
203 /* Timeout values (in ticks) */
204 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
205 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
207 /* Flash banks JFFS2 should use */
208 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
209 CONFIG_SYS_MAX_NAND_DEVICE)
211 #define CONFIG_SYS_JFFS2_MEM_NAND
212 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
213 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
215 #define CONFIG_JFFS2_NAND
216 /* nand device jffs2 lives on */
217 #define CONFIG_JFFS2_DEV "nand0"
218 /* Start of jffs2 partition */
219 #define CONFIG_JFFS2_PART_OFFSET 0x680000
220 /* Size of jffs2 partition */
221 #define CONFIG_JFFS2_PART_SIZE 0xf980000
226 #ifdef CONFIG_USB_OMAP3
228 #ifdef CONFIG_USB_MUSB_HCD
230 #define CONGIG_CMD_STORAGE
232 #ifdef CONFIG_USB_KEYBOARD
233 #define CONFIG_SYS_USB_EVENT_POLL
234 #define CONFIG_PREBOOT "usb start"
235 #endif /* CONFIG_USB_KEYBOARD */
237 #endif /* CONFIG_USB_MUSB_HCD */
239 #ifdef CONFIG_USB_MUSB_UDC
240 /* USB device configuration */
241 #define CONFIG_USB_DEVICE
242 #define CONFIG_USB_TTY
244 /* Change these to suit your needs */
245 #define CONFIG_USBD_VENDORID 0x0451
246 #define CONFIG_USBD_PRODUCTID 0x5678
247 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
248 #define CONFIG_USBD_PRODUCT_NAME "EVM"
249 #endif /* CONFIG_USB_MUSB_UDC */
251 #endif /* CONFIG_USB_OMAP3 */
253 /* ----------------------------------------------------------------------------
255 * ----------------------------------------------------------------------------
257 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
259 #define CONFIG_MISC_INIT_R
261 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
262 #define CONFIG_SETUP_MEMORY_TAGS
263 #define CONFIG_INITRD_TAG
264 #define CONFIG_REVISION_TAG
266 /* Size of Console IO buffer */
267 #define CONFIG_SYS_CBSIZE 512
269 /* Size of print buffer */
270 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
271 sizeof(CONFIG_SYS_PROMPT) + 16)
273 /* Size of bootarg buffer */
274 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
276 #define CONFIG_BOOTFILE "uImage"
281 #if defined(CONFIG_CMD_NAND)
282 #define CONFIG_SYS_FLASH_BASE NAND_BASE
284 #define CONFIG_NAND_OMAP_GPMC
285 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
286 #elif defined(CONFIG_CMD_ONENAND)
287 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
288 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
291 #if !defined(CONFIG_ENV_IS_NOWHERE)
292 #if defined(CONFIG_CMD_NAND)
293 #define CONFIG_ENV_IS_IN_NAND
294 #elif defined(CONFIG_CMD_ONENAND)
295 #define CONFIG_ENV_IS_IN_ONENAND
296 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
298 #endif /* CONFIG_ENV_IS_NOWHERE */
300 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
302 #if defined(CONFIG_CMD_NET)
304 /* Ethernet (SMSC9115 from SMSC9118 family) */
305 #define CONFIG_SMC911X
306 #define CONFIG_SMC911X_32_BIT
307 #define CONFIG_SMC911X_BASE 0x2C000000
310 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
311 #define CONFIG_BOOTP_GATEWAY 0x00000002
312 #define CONFIG_BOOTP_HOSTNAME 0x00000004
313 #define CONFIG_BOOTP_BOOTPATH 0x00000010
315 #endif /* CONFIG_CMD_NET */
317 /* Support for relocation */
318 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
319 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
320 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
321 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
322 CONFIG_SYS_INIT_RAM_SIZE - \
323 GENERATED_GBL_DATA_SIZE)
325 /* -----------------------------------------------------------------------------
327 * -----------------------------------------------------------------------------
329 #define CONFIG_SYS_NO_FLASH
331 /* Uncomment to define the board revision statically */
332 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
334 /* Defines for SPL */
335 #define CONFIG_SPL_FRAMEWORK
336 #define CONFIG_SPL_TEXT_BASE 0x40200800
337 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
338 CONFIG_SPL_TEXT_BASE)
340 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
341 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
343 #define CONFIG_SPL_BOARD_INIT
344 #define CONFIG_SPL_OMAP3_ID_NAND
345 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
348 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
349 * 64 bytes before this address should be set aside for u-boot.img's
350 * header. That is 0x800FFFC0--0x80100000 should not be used for any
353 #define CONFIG_SYS_TEXT_BASE 0x80100000
354 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
355 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
357 /* -----------------------------------------------------------------------------
358 * Default environment
359 * -----------------------------------------------------------------------------
362 #define CONFIG_EXTRA_ENV_SETTINGS \
363 "loadaddr=0x82000000\0" \
366 "console=ttyO0,115200n8\0" \
367 "mmcargs=setenv bootargs console=${console} " \
368 "root=/dev/mmcblk0p2 rw " \
369 "rootfstype=ext3 rootwait\0" \
370 "nandargs=setenv bootargs console=${console} " \
371 "root=/dev/mtdblock4 rw " \
372 "rootfstype=jffs2\0" \
373 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
374 "bootscript=echo Running bootscript from mmc ...; " \
375 "source ${loadaddr}\0" \
376 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
377 "mmcboot=echo Booting from mmc ...; " \
379 "bootm ${loadaddr}\0" \
380 "nandboot=echo Booting from nand ...; " \
382 "onenand read ${loadaddr} 280000 400000; " \
383 "bootm ${loadaddr}\0" \
385 #define CONFIG_BOOTCOMMAND \
386 "mmc dev ${mmcdev}; if mmc rescan; then " \
387 "if run loadbootscript; then " \
390 "if run loaduimage; then " \
392 "else run nandboot; " \
395 "else run nandboot; fi"
397 #endif /* __OMAP3EVM_CONFIG_H */