2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
7 * Configuration settings for the TI OMAP3530 Beagle board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * High Level Configuration Options
34 #define CONFIG_OMAP 1 /* in a TI OMAP core */
35 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
36 #define CONFIG_OMAP3430 1 /* which is in a 3430 */
37 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
39 #define CONFIG_SDRC /* The chip has SDRC controller */
41 #include <asm/arch/cpu.h> /* get chip and board defs */
42 #include <asm/arch/omap3.h>
45 * Display CPU and Board information
47 #define CONFIG_DISPLAY_CPUINFO 1
48 #define CONFIG_DISPLAY_BOARDINFO 1
51 #define V_OSCK 26000000 /* Clock output from T2 */
52 #define V_SCLK (V_OSCK >> 1)
54 #undef CONFIG_USE_IRQ /* no support for IRQs */
55 #define CONFIG_MISC_INIT_R
57 #define CONFIG_OF_LIBFDT 1
59 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
60 #define CONFIG_SETUP_MEMORY_TAGS 1
61 #define CONFIG_INITRD_TAG 1
62 #define CONFIG_REVISION_TAG 1
65 * Size of malloc() pool
67 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
69 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
76 * NS16550 Configuration
78 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
80 #define CONFIG_SYS_NS16550
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
83 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
86 * select serial console configuration
88 #define CONFIG_CONS_INDEX 3
89 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
90 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */
92 /* allow to overwrite serial and ethaddr */
93 #define CONFIG_ENV_OVERWRITE
94 #define CONFIG_BAUDRATE 115200
95 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
97 #define CONFIG_GENERIC_MMC 1
99 #define CONFIG_OMAP_HSMMC 1
100 #define CONFIG_DOS_PARTITION 1
103 #define CONFIG_STATUS_LED 1
104 #define CONFIG_BOARD_SPECIFIC_LED 1
105 #define STATUS_LED_BIT 0x01
106 #define STATUS_LED_STATE STATUS_LED_ON
107 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
108 #define STATUS_LED_BIT1 0x02
109 #define STATUS_LED_STATE1 STATUS_LED_ON
110 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
111 #define STATUS_LED_BOOT STATUS_LED_BIT
112 #define STATUS_LED_GREEN STATUS_LED_BIT1
114 /* DDR - I use Micron DDR */
115 #define CONFIG_OMAP3_MICRON_DDR 1
118 #define CONFIG_MUSB_UDC 1
119 #define CONFIG_USB_OMAP3 1
120 #define CONFIG_TWL4030_USB 1
122 /* USB device configuration */
123 #define CONFIG_USB_DEVICE 1
124 #define CONFIG_USB_TTY 1
125 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
128 #define CONFIG_CMD_USB
129 #define CONFIG_USB_EHCI
130 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
132 /* commands to include */
133 #include <config_cmd_default.h>
135 #define CONFIG_CMD_CACHE
136 #define CONFIG_CMD_EXT2 /* EXT2 Support */
137 #define CONFIG_CMD_FAT /* FAT support */
138 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
139 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
140 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
141 #define MTDIDS_DEFAULT "nand0=nand"
142 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
143 "1920k(u-boot),128k(u-boot-env),"\
146 #define CONFIG_CMD_I2C /* I2C serial bus support */
147 #define CONFIG_CMD_MMC /* MMC support */
148 #define CONFIG_USB_STORAGE /* USB storage support */
149 #define CONFIG_CMD_NAND /* NAND support */
150 #define CONFIG_CMD_LED /* LED support */
152 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
153 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
154 #undef CONFIG_CMD_IMI /* iminfo */
155 #undef CONFIG_CMD_IMLS /* List all found images */
156 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
157 #undef CONFIG_CMD_NFS /* NFS support */
159 #define CONFIG_SYS_NO_FLASH
160 #define CONFIG_HARD_I2C 1
161 #define CONFIG_SYS_I2C_SPEED 100000
162 #define CONFIG_SYS_I2C_SLAVE 1
163 #define CONFIG_SYS_I2C_BUS 0
164 #define CONFIG_SYS_I2C_BUS_SELECT 1
165 #define CONFIG_I2C_MULTI_BUS 1
166 #define CONFIG_DRIVER_OMAP34XX_I2C 1
171 #define CONFIG_TWL4030_POWER 1
172 #define CONFIG_TWL4030_LED 1
177 #define CONFIG_SYS_NAND_QUIET_TEST 1
178 #define CONFIG_NAND_OMAP_GPMC
179 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
181 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
182 /* to access nand at */
184 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
186 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
188 #define CONFIG_JFFS2_NAND
189 /* nand device jffs2 lives on */
190 #define CONFIG_JFFS2_DEV "nand0"
191 /* start of jffs2 partition */
192 #define CONFIG_JFFS2_PART_OFFSET 0x680000
193 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
196 /* Environment information */
197 #define CONFIG_BOOTDELAY 10
199 #define CONFIG_EXTRA_ENV_SETTINGS \
200 "loadaddr=0x82000000\0" \
202 "usbethaddr=de:ad:be:ef\0" \
203 "console=ttyS2,115200n8\0" \
207 "dvimode=1024x768MR-16@60\0" \
208 "defaultdisplay=dvi\0" \
210 "mmcroot=/dev/mmcblk0p2 rw\0" \
211 "mmcrootfstype=ext3 rootwait\0" \
212 "nandroot=/dev/mtdblock4 rw\0" \
213 "nandrootfstype=jffs2\0" \
214 "mmcargs=setenv bootargs console=${console} " \
215 "mpurate=${mpurate} " \
218 "omapfb.mode=dvi:${dvimode} " \
219 "omapdss.def_disp=${defaultdisplay} " \
221 "rootfstype=${mmcrootfstype}\0" \
222 "nandargs=setenv bootargs console=${console} " \
223 "mpurate=${mpurate} " \
226 "omapfb.mode=dvi:${dvimode} " \
227 "omapdss.def_disp=${defaultdisplay} " \
228 "root=${nandroot} " \
229 "rootfstype=${nandrootfstype}\0" \
230 "bootenv=uEnv.txt\0" \
231 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
232 "importbootenv=echo Importing environment from mmc ...; " \
233 "env import -t $loadaddr $filesize\0" \
234 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
235 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
236 "mmcboot=echo Booting from mmc ...; " \
238 "bootm ${loadaddr}\0" \
239 "nandboot=echo Booting from nand ...; " \
241 "nand read ${loadaddr} 280000 400000; " \
242 "bootm ${loadaddr}\0" \
244 #define CONFIG_BOOTCOMMAND \
245 "if mmc rescan ${mmcdev}; then " \
246 "if userbutton; then " \
247 "setenv bootenv user.txt;" \
249 "echo SD/MMC found on device ${mmcdev};" \
250 "if run loadbootenv; then " \
251 "echo Loaded environment from ${bootenv};" \
252 "run importbootenv;" \
254 "if test -n $uenvcmd; then " \
255 "echo Running uenvcmd ...;" \
258 "if run loaduimage; then " \
264 #define CONFIG_AUTO_COMPLETE 1
266 * Miscellaneous configurable options
268 #define CONFIG_SYS_LONGHELP /* undef to save memory */
269 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
270 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
271 #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # "
272 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
273 /* Print Buffer Size */
274 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
275 sizeof(CONFIG_SYS_PROMPT) + 16)
276 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
277 /* Boot Argument Buffer Size */
278 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
280 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
282 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
283 0x01F00000) /* 31MB */
285 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
289 * OMAP3 has 12 GP timers, they can be driven by the system clock
290 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
291 * This rate is divided by a local divisor.
293 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
294 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
295 #define CONFIG_SYS_HZ 1000
297 /*-----------------------------------------------------------------------
300 * The stack sizes are set up in start.S using the settings below
302 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
303 #ifdef CONFIG_USE_IRQ
304 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
305 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
308 /*-----------------------------------------------------------------------
309 * Physical Memory Map
311 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
312 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
313 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
314 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
316 /* SDRAM Bank Allocation method */
319 /*-----------------------------------------------------------------------
320 * FLASH and environment organization
323 /* **** PISMO SUPPORT *** */
325 /* Configure the PISMO */
326 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
327 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
329 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
331 #if defined(CONFIG_CMD_NAND)
332 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
335 /* Monitor at start of flash */
336 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
337 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
339 #define CONFIG_ENV_IS_IN_NAND 1
340 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
341 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
343 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
344 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
345 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
347 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
348 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
349 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
350 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
351 CONFIG_SYS_INIT_RAM_SIZE - \
352 GENERATED_GBL_DATA_SIZE)
354 #define CONFIG_OMAP3_SPI
356 #endif /* __CONFIG_H */