2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
7 * Configuration settings for the TI OMAP3530 Beagle board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * High Level Configuration Options
34 #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
35 #define CONFIG_OMAP 1 /* in a TI OMAP core */
36 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
37 #define CONFIG_OMAP3430 1 /* which is in a 3430 */
38 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
40 #include <asm/arch/cpu.h> /* get chip and board defs */
41 #include <asm/arch/omap3.h>
44 * Display CPU and Board information
46 #define CONFIG_DISPLAY_CPUINFO 1
47 #define CONFIG_DISPLAY_BOARDINFO 1
50 #define V_OSCK 26000000 /* Clock output from T2 */
51 #define V_SCLK (V_OSCK >> 1)
53 #undef CONFIG_USE_IRQ /* no support for IRQs */
54 #define CONFIG_MISC_INIT_R
56 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
57 #define CONFIG_SETUP_MEMORY_TAGS 1
58 #define CONFIG_INITRD_TAG 1
59 #define CONFIG_REVISION_TAG 1
62 * Size of malloc() pool
64 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
66 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
67 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
75 * NS16550 Configuration
77 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
79 #define CONFIG_SYS_NS16550
80 #define CONFIG_SYS_NS16550_SERIAL
81 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
82 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
85 * select serial console configuration
87 #define CONFIG_CONS_INDEX 3
88 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
89 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */
91 /* allow to overwrite serial and ethaddr */
92 #define CONFIG_ENV_OVERWRITE
93 #define CONFIG_BAUDRATE 115200
94 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
97 #define CONFIG_OMAP3_MMC 1
98 #define CONFIG_DOS_PARTITION 1
100 /* DDR - I use Micron DDR */
101 #define CONFIG_OMAP3_MICRON_DDR 1
103 /* commands to include */
104 #include <config_cmd_default.h>
106 #define CONFIG_CMD_EXT2 /* EXT2 Support */
107 #define CONFIG_CMD_FAT /* FAT support */
108 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
109 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
110 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
111 #define MTDIDS_DEFAULT "nand0=nand"
112 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
113 "1920k(u-boot),128k(u-boot-env),"\
116 #define CONFIG_CMD_I2C /* I2C serial bus support */
117 #define CONFIG_CMD_MMC /* MMC support */
118 #define CONFIG_CMD_NAND /* NAND support */
120 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
121 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
122 #undef CONFIG_CMD_IMI /* iminfo */
123 #undef CONFIG_CMD_IMLS /* List all found images */
124 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
125 #undef CONFIG_CMD_NFS /* NFS support */
127 #define CONFIG_SYS_NO_FLASH
128 #define CONFIG_HARD_I2C 1
129 #define CONFIG_SYS_I2C_SPEED 100000
130 #define CONFIG_SYS_I2C_SLAVE 1
131 #define CONFIG_SYS_I2C_BUS 0
132 #define CONFIG_SYS_I2C_BUS_SELECT 1
133 #define CONFIG_DRIVER_OMAP34XX_I2C 1
138 #define CONFIG_TWL4030_POWER 1
139 #define CONFIG_TWL4030_LED 1
144 #define CONFIG_NAND_OMAP_GPMC
145 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
147 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
148 /* to access nand at */
150 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
152 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
154 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
156 #define CONFIG_JFFS2_NAND
157 /* nand device jffs2 lives on */
158 #define CONFIG_JFFS2_DEV "nand0"
159 /* start of jffs2 partition */
160 #define CONFIG_JFFS2_PART_OFFSET 0x680000
161 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
164 /* Environment information */
165 #define CONFIG_BOOTDELAY 10
167 #define CONFIG_EXTRA_ENV_SETTINGS \
168 "loadaddr=0x82000000\0" \
169 "console=ttyS2,115200n8\0" \
171 "dvimode=1024x768MR-16@60\0" \
172 "defaultdisplay=dvi\0" \
173 "mmcroot=/dev/mmcblk0p2 rw\0" \
174 "mmcrootfstype=ext3 rootwait\0" \
175 "nandroot=/dev/mtdblock4 rw\0" \
176 "nandrootfstype=jffs2\0" \
177 "mmcargs=setenv bootargs console=${console} " \
179 "omapfb.mode=dvi:${dvimode} " \
181 "omapdss.def_disp=${defaultdisplay} " \
183 "rootfstype=${mmcrootfstype}\0" \
184 "nandargs=setenv bootargs console=${console} " \
186 "omapfb.mode=dvi:${dvimode} " \
188 "omapdss.def_disp=${defaultdisplay} " \
189 "root=${nandroot} " \
190 "rootfstype=${nandrootfstype}\0" \
191 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
192 "bootscript=echo Running bootscript from mmc ...; " \
193 "source ${loadaddr}\0" \
194 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
195 "mmcboot=echo Booting from mmc ...; " \
197 "bootm ${loadaddr}\0" \
198 "nandboot=echo Booting from nand ...; " \
200 "nand read ${loadaddr} 280000 400000; " \
201 "bootm ${loadaddr}\0" \
203 #define CONFIG_BOOTCOMMAND \
204 "if mmc init; then " \
205 "if run loadbootscript; then " \
208 "if run loaduimage; then " \
210 "else run nandboot; " \
213 "else run nandboot; fi"
215 #define CONFIG_AUTO_COMPLETE 1
217 * Miscellaneous configurable options
219 #define V_PROMPT "OMAP3 beagleboard.org # "
221 #define CONFIG_SYS_LONGHELP /* undef to save memory */
222 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
223 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
224 #define CONFIG_SYS_PROMPT V_PROMPT
225 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
226 /* Print Buffer Size */
227 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
228 sizeof(CONFIG_SYS_PROMPT) + 16)
229 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
230 /* Boot Argument Buffer Size */
231 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
233 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
235 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
236 0x01F00000) /* 31MB */
238 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
242 * OMAP3 has 12 GP timers, they can be driven by the system clock
243 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
244 * This rate is divided by a local divisor.
246 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
247 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
248 #define CONFIG_SYS_HZ 1000
250 /*-----------------------------------------------------------------------
253 * The stack sizes are set up in start.S using the settings below
255 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
256 #ifdef CONFIG_USE_IRQ
257 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
258 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
261 /*-----------------------------------------------------------------------
262 * Physical Memory Map
264 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
265 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
266 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
267 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
269 /* SDRAM Bank Allocation method */
272 /*-----------------------------------------------------------------------
273 * FLASH and environment organization
276 /* **** PISMO SUPPORT *** */
278 /* Configure the PISMO */
279 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
280 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
282 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
284 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
285 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
287 #define CONFIG_SYS_FLASH_BASE boot_flash_base
289 /* Monitor at start of flash */
290 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
291 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
293 #define CONFIG_ENV_IS_IN_NAND 1
294 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
295 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
297 #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
298 #define CONFIG_ENV_OFFSET boot_flash_off
299 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
301 /*-----------------------------------------------------------------------
302 * CFI FLASH driver setup
304 /* timeout values are in ticks */
305 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
306 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
308 /* Flash banks JFFS2 should use */
309 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
310 CONFIG_SYS_MAX_NAND_DEVICE)
311 #define CONFIG_SYS_JFFS2_MEM_NAND
312 /* use flash_info[2] */
313 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
314 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
317 extern struct gpmc *gpmc_cfg;
318 extern unsigned int boot_flash_base;
319 extern volatile unsigned int boot_flash_env_addr;
320 extern unsigned int boot_flash_off;
321 extern unsigned int boot_flash_sec;
322 extern unsigned int boot_flash_type;
325 #endif /* __CONFIG_H */