ml507: Fix Xilinx uartlite driver hang
[platform/kernel/u-boot.git] / include / configs / omap3_beagle.h
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * Configuration settings for the TI OMAP3530 Beagle board.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27
28 #ifndef __CONFIG_H
29 #define __CONFIG_H
30
31 /*
32  * High Level Configuration Options
33  */
34 #define CONFIG_OMAP             1       /* in a TI OMAP core */
35 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
36 #define CONFIG_OMAP3_BEAGLE     1       /* working with BEAGLE */
37 #define CONFIG_OMAP_GPIO
38
39 #define CONFIG_SDRC     /* The chip has SDRC controller */
40
41 #include <asm/arch/cpu.h>               /* get chip and board defs */
42 #include <asm/arch/omap3.h>
43
44 /*
45  * Display CPU and Board information
46  */
47 #define CONFIG_DISPLAY_CPUINFO          1
48 #define CONFIG_DISPLAY_BOARDINFO        1
49
50 /* Clock Defines */
51 #define V_OSCK                  26000000        /* Clock output from T2 */
52 #define V_SCLK                  (V_OSCK >> 1)
53
54 #define CONFIG_MISC_INIT_R
55
56 #define CONFIG_OF_LIBFDT                1
57
58 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS        1
60 #define CONFIG_INITRD_TAG               1
61 #define CONFIG_REVISION_TAG             1
62
63 /*
64  * Size of malloc() pool
65  */
66 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
67                                                 /* Sector */
68 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
69
70 /*
71  * Hardware drivers
72  */
73
74 /*
75  * NS16550 Configuration
76  */
77 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
78
79 #define CONFIG_SYS_NS16550
80 #define CONFIG_SYS_NS16550_SERIAL
81 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
82 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
83
84 /*
85  * select serial console configuration
86  */
87 #define CONFIG_CONS_INDEX               3
88 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
89 #define CONFIG_SERIAL3                  3       /* UART3 on Beagle Rev 2 */
90
91 /* allow to overwrite serial and ethaddr */
92 #define CONFIG_ENV_OVERWRITE
93 #define CONFIG_BAUDRATE                 115200
94 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
95                                         115200}
96 #define CONFIG_GENERIC_MMC              1
97 #define CONFIG_MMC                      1
98 #define CONFIG_OMAP_HSMMC               1
99 #define CONFIG_DOS_PARTITION            1
100
101 /* Status LED */
102 #define CONFIG_STATUS_LED               1
103 #define CONFIG_BOARD_SPECIFIC_LED       1
104 #define STATUS_LED_BIT                  0x01
105 #define STATUS_LED_STATE                STATUS_LED_ON
106 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
107 #define STATUS_LED_BIT1                 0x02
108 #define STATUS_LED_STATE1               STATUS_LED_ON
109 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
110 #define STATUS_LED_BOOT                 STATUS_LED_BIT
111 #define STATUS_LED_GREEN                STATUS_LED_BIT1
112
113 /* Enable Multi Bus support for I2C */
114 #define CONFIG_I2C_MULTI_BUS            1
115
116 /* Probe all devices */
117 #define CONFIG_SYS_I2C_NOPROBES         {{0x0, 0x0}}
118
119 /* USB */
120 #define CONFIG_MUSB_UDC                 1
121 #define CONFIG_USB_OMAP3                1
122 #define CONFIG_TWL4030_USB              1
123
124 /* USB device configuration */
125 #define CONFIG_USB_DEVICE               1
126 #define CONFIG_USB_TTY                  1
127 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
128
129 /* USB EHCI */
130 #define CONFIG_CMD_USB
131 #define CONFIG_USB_EHCI
132
133 #define CONFIG_USB_EHCI_OMAP
134 /*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */
135 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        147
136
137 #define CONFIG_USB_ULPI
138 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
139
140 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
141 #define CONFIG_USB_HOST_ETHER
142 #define CONFIG_USB_ETHER_SMSC95XX
143 #define CONFIG_USB_ETHER_ASIX
144
145
146 /* commands to include */
147 #include <config_cmd_default.h>
148
149 #define CONFIG_CMD_ASKENV
150
151 #define CONFIG_CMD_CACHE
152 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
153 #define CONFIG_CMD_FAT          /* FAT support                  */
154 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
155 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
156 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
157 #define MTDIDS_DEFAULT                  "nand0=nand"
158 #define MTDPARTS_DEFAULT                "mtdparts=nand:512k(x-loader),"\
159                                         "1920k(u-boot),128k(u-boot-env),"\
160                                         "4m(kernel),-(fs)"
161
162 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
163 #define CONFIG_CMD_MMC          /* MMC support                  */
164 #define CONFIG_USB_STORAGE      /* USB storage support          */
165 #define CONFIG_CMD_NAND         /* NAND support                 */
166 #define CONFIG_CMD_LED          /* LED support                  */
167 #define CONFIG_CMD_NET      /* bootp, tftpboot, rarpboot    */
168 #define CONFIG_CMD_NFS      /* NFS support          */
169 #define CONFIG_CMD_PING
170 #define CONFIG_CMD_DHCP
171 #define CONFIG_CMD_SETEXPR      /* Evaluate expressions         */
172 #define CONFIG_CMD_GPIO     /* Enable gpio command */
173
174 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
175 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
176 #undef CONFIG_CMD_IMI           /* iminfo                       */
177 #undef CONFIG_CMD_IMLS          /* List all found images        */
178
179 #define CONFIG_SYS_NO_FLASH
180 #define CONFIG_HARD_I2C                 1
181 #define CONFIG_SYS_I2C_SPEED            100000
182 #define CONFIG_SYS_I2C_SLAVE            1
183 #define CONFIG_SYS_I2C_BUS              0
184 #define CONFIG_SYS_I2C_BUS_SELECT       1
185 #define CONFIG_I2C_MULTI_BUS            1
186 #define CONFIG_DRIVER_OMAP34XX_I2C      1
187 #define CONFIG_VIDEO_OMAP3      /* DSS Support                  */
188
189 /*
190  * TWL4030
191  */
192 #define CONFIG_TWL4030_POWER            1
193 #define CONFIG_TWL4030_LED              1
194
195 /*
196  * Board NAND Info.
197  */
198 #define CONFIG_SYS_NAND_QUIET_TEST      1
199 #define CONFIG_NAND_OMAP_GPMC
200 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
201                                                         /* to access nand */
202 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
203                                                         /* to access nand at */
204                                                         /* CS0 */
205 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
206
207 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
208                                                         /* devices */
209 #define CONFIG_JFFS2_NAND
210 /* nand device jffs2 lives on */
211 #define CONFIG_JFFS2_DEV                "nand0"
212 /* start of jffs2 partition */
213 #define CONFIG_JFFS2_PART_OFFSET        0x680000
214 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
215                                                         /* partition */
216
217 /* Environment information */
218 #define CONFIG_BOOTDELAY                3
219
220 #define CONFIG_EXTRA_ENV_SETTINGS \
221         "loadaddr=0x80200000\0" \
222         "rdaddr=0x81000000\0" \
223         "usbtty=cdc_acm\0" \
224         "bootfile=uImage.beagle\0" \
225         "console=ttyO2,115200n8\0" \
226         "mpurate=auto\0" \
227         "buddy=none\0" \
228         "optargs=\0" \
229         "camera=none\0" \
230         "vram=12M\0" \
231         "dvimode=640x480MR-16@60\0" \
232         "defaultdisplay=dvi\0" \
233         "mmcdev=0\0" \
234         "mmcroot=/dev/mmcblk0p2 rw\0" \
235         "mmcrootfstype=ext3 rootwait\0" \
236         "nandroot=ubi0:rootfs ubi.mtd=4\0" \
237         "nandrootfstype=ubifs\0" \
238         "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
239         "ramrootfstype=ext2\0" \
240         "mmcargs=setenv bootargs console=${console} " \
241                 "${optargs} " \
242                 "mpurate=${mpurate} " \
243                 "buddy=${buddy} "\
244                 "camera=${camera} "\
245                 "vram=${vram} " \
246                 "omapfb.mode=dvi:${dvimode} " \
247                 "omapdss.def_disp=${defaultdisplay} " \
248                 "root=${mmcroot} " \
249                 "rootfstype=${mmcrootfstype}\0" \
250         "nandargs=setenv bootargs console=${console} " \
251                 "${optargs} " \
252                 "mpurate=${mpurate} " \
253                 "buddy=${buddy} "\
254                 "camera=${camera} "\
255                 "vram=${vram} " \
256                 "omapfb.mode=dvi:${dvimode} " \
257                 "omapdss.def_disp=${defaultdisplay} " \
258                 "root=${nandroot} " \
259                 "rootfstype=${nandrootfstype}\0" \
260         "bootenv=uEnv.txt\0" \
261         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
262         "importbootenv=echo Importing environment from mmc ...; " \
263                 "env import -t $loadaddr $filesize\0" \
264         "ramargs=setenv bootargs console=${console} " \
265                 "${optargs} " \
266                 "mpurate=${mpurate} " \
267                 "buddy=${buddy} "\
268                 "vram=${vram} " \
269                 "omapfb.mode=dvi:${dvimode} " \
270                 "omapdss.def_disp=${defaultdisplay} " \
271                 "root=${ramroot} " \
272                 "rootfstype=${ramrootfstype}\0" \
273         "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
274         "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
275         "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
276         "mmcboot=echo Booting from mmc ...; " \
277                 "run mmcargs; " \
278                 "bootm ${loadaddr}\0" \
279         "nandboot=echo Booting from nand ...; " \
280                 "run nandargs; " \
281                 "nand read ${loadaddr} 280000 400000; " \
282                 "bootm ${loadaddr}\0" \
283         "ramboot=echo Booting from ramdisk ...; " \
284                 "run ramargs; " \
285                 "bootm ${loadaddr}\0" \
286         "userbutton=if gpio input 173; then run userbutton_xm; " \
287                 "else run userbutton_nonxm; fi;\0" \
288         "userbutton_xm=gpio input 4;\0" \
289         "userbutton_nonxm=gpio input 7;\0"
290 /* "run userbutton" will return 1 (false) if is pressed and 0 (false) if not */
291 #define CONFIG_BOOTCOMMAND \
292         "if mmc rescan ${mmcdev}; then " \
293                 "if run userbutton; then " \
294                         "setenv bootenv uEnv.txt;" \
295                 "else " \
296                         "setenv bootenv user.txt;" \
297                 "fi;" \
298                 "echo SD/MMC found on device ${mmcdev};" \
299                 "if run loadbootenv; then " \
300                         "echo Loaded environment from ${bootenv};" \
301                         "run importbootenv;" \
302                 "fi;" \
303                 "if test -n $uenvcmd; then " \
304                         "echo Running uenvcmd ...;" \
305                         "run uenvcmd;" \
306                 "fi;" \
307                 "if run loaduimage; then " \
308                         "run mmcboot;" \
309                 "fi;" \
310         "fi;" \
311         "run nandboot;" \
312
313 #define CONFIG_AUTO_COMPLETE            1
314 /*
315  * Miscellaneous configurable options
316  */
317 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
318 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
319 #define CONFIG_SYS_PROMPT               "OMAP3 beagleboard.org # "
320 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
321 /* Print Buffer Size */
322 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
323                                         sizeof(CONFIG_SYS_PROMPT) + 16)
324 #define CONFIG_SYS_MAXARGS              32      /* max number of command args */
325 /* Boot Argument Buffer Size */
326 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
327
328 #define CONFIG_SYS_ALT_MEMTEST          1
329 #define CONFIG_SYS_MEMTEST_START        (0x82000000)            /* memtest */
330                                                                 /* defaults */
331 #define CONFIG_SYS_MEMTEST_END          (0x87FFFFFF)            /* 128MB */
332 #define CONFIG_SYS_MEMTEST_SCRATCH      (0x81000000)    /* dummy address */
333
334 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
335                                                         /* load address */
336
337 /*
338  * OMAP3 has 12 GP timers, they can be driven by the system clock
339  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
340  * This rate is divided by a local divisor.
341  */
342 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
343 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
344 #define CONFIG_SYS_HZ                   1000
345
346 /*-----------------------------------------------------------------------
347  * Physical Memory Map
348  */
349 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
350 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
351 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
352
353 /*-----------------------------------------------------------------------
354  * FLASH and environment organization
355  */
356
357 /* **** PISMO SUPPORT *** */
358
359 /* Configure the PISMO */
360 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
361 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
362
363 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
364
365 #if defined(CONFIG_CMD_NAND)
366 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
367 #endif
368
369 /* Monitor at start of flash */
370 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
371 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
372
373 #define CONFIG_ENV_IS_IN_NAND           1
374 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
375 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
376
377 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
378 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
379 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
380
381 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
382 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
383 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
384 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
385                                          CONFIG_SYS_INIT_RAM_SIZE - \
386                                          GENERATED_GBL_DATA_SIZE)
387
388 #define CONFIG_OMAP3_SPI
389
390 #define CONFIG_SYS_CACHELINE_SIZE       64
391
392 /* Defines for SPL */
393 #define CONFIG_SPL
394 #define CONFIG_SPL_FRAMEWORK
395 #define CONFIG_SPL_NAND_SIMPLE
396 #define CONFIG_SPL_TEXT_BASE            0x40200800
397 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
398 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
399
400 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
401 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
402
403 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
404 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
405 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
406 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
407
408 #define CONFIG_SPL_BOARD_INIT
409 #define CONFIG_SPL_LIBCOMMON_SUPPORT
410 #define CONFIG_SPL_LIBDISK_SUPPORT
411 #define CONFIG_SPL_I2C_SUPPORT
412 #define CONFIG_SPL_LIBGENERIC_SUPPORT
413 #define CONFIG_SPL_MMC_SUPPORT
414 #define CONFIG_SPL_FAT_SUPPORT
415 #define CONFIG_SPL_SERIAL_SUPPORT
416 #define CONFIG_SPL_NAND_SUPPORT
417 #define CONFIG_SPL_GPIO_SUPPORT
418 #define CONFIG_SPL_POWER_SUPPORT
419 #define CONFIG_SPL_OMAP3_ID_NAND
420 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
421
422 /* NAND boot config */
423 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
424 #define CONFIG_SYS_NAND_PAGE_COUNT      64
425 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
426 #define CONFIG_SYS_NAND_OOBSIZE         64
427 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
428 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
429 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
430                                                 10, 11, 12, 13}
431 #define CONFIG_SYS_NAND_ECCSIZE         512
432 #define CONFIG_SYS_NAND_ECCBYTES        3
433 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
434 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
435
436 /*
437  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
438  * 64 bytes before this address should be set aside for u-boot.img's
439  * header. That is 0x800FFFC0--0x80100000 should not be used for any
440  * other needs.
441  */
442 #define CONFIG_SYS_TEXT_BASE            0x80100000
443 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
444 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
445
446 #endif /* __CONFIG_H */