2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
7 * Configuration settings for the TI OMAP3530 Beagle board.
9 * SPDX-License-Identifier: GPL-2.0+
15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
19 * 64 bytes before this address should be set aside for u-boot.img's
20 * header. That is 0x800FFFC0--0x80100000 should not be used for any
21 * other needs. We use this rather than the inherited defines from
22 * ti_armv7_common.h for backwards compatibility.
24 #define CONFIG_SYS_TEXT_BASE 0x80100000
25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
30 #include <configs/ti_omap3_common.h>
32 #define CONFIG_MISC_INIT_R
34 #define CONFIG_REVISION_TAG 1
35 #define CONFIG_ENV_OVERWRITE
38 #define CONFIG_STATUS_LED 1
39 #define CONFIG_BOARD_SPECIFIC_LED 1
40 #define STATUS_LED_BIT 0x01
41 #define STATUS_LED_STATE STATUS_LED_ON
42 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
43 #define STATUS_LED_BIT1 0x02
44 #define STATUS_LED_STATE1 STATUS_LED_ON
45 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
46 #define STATUS_LED_BOOT STATUS_LED_BIT
47 #define STATUS_LED_GREEN STATUS_LED_BIT1
49 /* Enable Multi Bus support for I2C */
50 #define CONFIG_I2C_MULTI_BUS 1
52 /* Probe all devices */
53 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
56 #define CONFIG_USB_MUSB_OMAP2PLUS
57 #define CONFIG_USB_MUSB_PIO_ONLY
58 #define CONFIG_TWL4030_USB 1
59 #define CONFIG_USB_ETHER
60 #define CONFIG_USB_ETHER_RNDIS
61 #define CONFIG_USB_FUNCTION_FASTBOOT
62 #define CONFIG_CMD_FASTBOOT
63 #define CONFIG_ANDROID_BOOT_IMAGE
64 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
65 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
68 #define CONFIG_USB_EHCI
70 #define CONFIG_USB_EHCI_OMAP
71 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
73 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
74 #define CONFIG_USB_HOST_ETHER
75 #define CONFIG_USB_ETHER_ASIX
76 #define CONFIG_USB_ETHER_MCS7830
77 #define CONFIG_USB_ETHER_SMSC95XX
80 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
81 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
83 /* commands to include */
85 #define MTDIDS_DEFAULT "nand0=nand"
86 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
87 "1920k(u-boot),128k(u-boot-env),"\
90 #define CONFIG_CMD_NAND /* NAND support */
91 #define CONFIG_CMD_LED /* LED support */
93 #define CONFIG_VIDEO_OMAP3 /* DSS Support */
98 #define CONFIG_TWL4030_LED 1
103 #define CONFIG_NAND_OMAP_GPMC
104 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
107 #define CONFIG_EXTRA_ENV_SETTINGS \
108 "loadaddr=0x80200000\0" \
109 "rdaddr=0x81000000\0" \
110 "fdt_high=0xffffffff\0" \
111 "fdtaddr=0x80f80000\0" \
113 "bootfile=uImage\0" \
114 "ramdisk=ramdisk.gz\0" \
117 "console=ttyO2,115200n8\0" \
123 "dvimode=640x480MR-16@60\0" \
124 "defaultdisplay=dvi\0" \
126 "mmcroot=/dev/mmcblk0p2 rw\0" \
127 "mmcrootfstype=ext3 rootwait\0" \
128 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
129 "nandrootfstype=ubifs\0" \
130 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
131 "ramrootfstype=ext2\0" \
132 "mmcargs=setenv bootargs console=${console} " \
134 "mpurate=${mpurate} " \
138 "omapfb.mode=dvi:${dvimode} " \
139 "omapdss.def_disp=${defaultdisplay} " \
141 "rootfstype=${mmcrootfstype}\0" \
142 "nandargs=setenv bootargs console=${console} " \
144 "mpurate=${mpurate} " \
148 "omapfb.mode=dvi:${dvimode} " \
149 "omapdss.def_disp=${defaultdisplay} " \
150 "root=${nandroot} " \
151 "rootfstype=${nandrootfstype}\0" \
153 "if test $beaglerev = AxBx; then " \
154 "setenv fdtfile omap3-beagle.dtb; fi; " \
155 "if test $beaglerev = Cx; then " \
156 "setenv fdtfile omap3-beagle.dtb; fi; " \
157 "if test $beaglerev = C4; then " \
158 "setenv fdtfile omap3-beagle.dtb; fi; " \
159 "if test $beaglerev = xMAB; then " \
160 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
161 "if test $beaglerev = xMC; then " \
162 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \
163 "if test $fdtfile = undefined; then " \
164 "echo WARNING: Could not determine device tree to use; fi; \0" \
166 "if test $beaglerev = xMAB; then " \
167 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
168 "setenv fdtfile omap3-beagle-xm.dtb; " \
171 "bootenv=uEnv.txt\0" \
172 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
173 "importbootenv=echo Importing environment from mmc ...; " \
174 "env import -t -r $loadaddr $filesize\0" \
175 "ramargs=setenv bootargs console=${console} " \
177 "mpurate=${mpurate} " \
180 "omapfb.mode=dvi:${dvimode} " \
181 "omapdss.def_disp=${defaultdisplay} " \
183 "rootfstype=${ramrootfstype}\0" \
184 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
185 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
186 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
187 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
188 "source ${loadaddr}\0" \
189 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
190 "mmcboot=echo Booting from mmc ...; " \
192 "bootm ${loadaddr}\0" \
193 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
195 "bootz ${loadaddr} - ${fdtaddr}\0" \
196 "nandboot=echo Booting from nand ...; " \
198 "nand read ${loadaddr} 280000 400000; " \
199 "bootm ${loadaddr}\0" \
200 "ramboot=echo Booting from ramdisk ...; " \
202 "bootm ${loadaddr}\0" \
203 "userbutton=if gpio input 173; then run userbutton_xm; " \
204 "else run userbutton_nonxm; fi;\0" \
205 "userbutton_xm=gpio input 4;\0" \
206 "userbutton_nonxm=gpio input 7;\0"
207 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
208 #define CONFIG_BOOTCOMMAND \
210 "mmc dev ${mmcdev}; if mmc rescan; then " \
211 "if run userbutton; then " \
212 "setenv bootenv uEnv.txt;" \
214 "setenv bootenv user.txt;" \
216 "echo SD/MMC found on device ${mmcdev};" \
217 "if run loadbootenv; then " \
218 "echo Loaded environment from ${bootenv};" \
219 "run importbootenv;" \
221 "if test -n $uenvcmd; then " \
222 "echo Running uenvcmd ...;" \
225 "if run loadbootscript; then " \
228 "if run loadimage; then " \
234 "setenv bootfile zImage;" \
235 "if run loadimage; then " \
241 * OMAP3 has 12 GP timers, they can be driven by the system clock
242 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
243 * This rate is divided by a local divisor.
245 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
247 /*-----------------------------------------------------------------------
248 * FLASH and environment organization
251 /* **** PISMO SUPPORT *** */
252 #if defined(CONFIG_CMD_NAND)
253 #define CONFIG_SYS_FLASH_BASE NAND_BASE
256 /* Monitor at start of flash */
257 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
258 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
260 #define CONFIG_ENV_IS_IN_NAND 1
261 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
262 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
263 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
265 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
266 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
267 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
269 #define CONFIG_OMAP3_SPI
271 /* Defines for SPL */
272 #define CONFIG_SPL_OMAP3_ID_NAND
274 /* NAND boot config */
275 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
276 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
277 #define CONFIG_SYS_NAND_PAGE_COUNT 64
278 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
279 #define CONFIG_SYS_NAND_OOBSIZE 64
280 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
281 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
282 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
284 #define CONFIG_SYS_NAND_ECCSIZE 512
285 #define CONFIG_SYS_NAND_ECCBYTES 3
286 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
287 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
288 /* NAND: SPL falcon mode configs */
289 #ifdef CONFIG_SPL_OS_BOOT
290 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
291 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
292 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
295 #endif /* __CONFIG_H */