4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * If we are developing, we might want to start armboot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
33 #define CONFIG_INIT_CRITICAL /* undef for developing */
36 * High Level Configuration Options
39 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
40 #define CONFIG_OMAP 1 /* in a TI OMAP core */
41 #define CONFIG_OMAP1610 1 /* which is in a 1610 */
42 #define CONFIG_INNOVATOROMAP1610 1 /* a Innovator Board */
44 /* input clock of PLL */
45 /* the OMAP1610 Innovator has 12MHz input clock */
46 #define CONFIG_SYS_CLK_FREQ 12000000
48 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
50 #define CONFIG_MISC_INIT_R
52 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
53 #define CONFIG_SETUP_MEMORY_TAGS 1
56 * Size of malloc() pool
58 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
59 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
66 #define CONFIG_DRIVER_LAN91C96
67 #define CONFIG_LAN91C96_BASE 0x04000300
68 #define CONFIG_LAN91C96_EXT_PHY
71 * NS16550 Configuration
74 #define CFG_NS16550_SERIAL
75 #define CFG_NS16550_REG_SIZE (-4)
76 #define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
77 #define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
80 * select serial console configuration
82 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 Innovator */
84 /* allow to overwrite serial and ethaddr */
85 #define CONFIG_ENV_OVERWRITE
86 #define CONFIG_CONS_INDEX 1
87 #define CONFIG_BAUDRATE 115200
88 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
90 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
91 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
93 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
94 #include <cmd_confdefs.h>
95 #include <configs/omap1510.h>
97 #define CONFIG_BOOTDELAY 3
98 #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
99 root=/dev/nfs rw nfsroot=157.87.82.48:\
100 /home/a0875451/mwd/myfs/target ip=dhcp"
101 #define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
102 #define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
103 #define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
104 #define CONFIG_BOOTFILE "uImage" /* file to load */
106 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
107 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
108 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
112 * Miscellaneous configurable options
114 #define CFG_LONGHELP /* undef to save memory */
115 #define CFG_PROMPT "OMAP1610 Innovator # " /* Monitor Command Prompt */
116 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
117 /* Print Buffer Size */
118 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
119 #define CFG_MAXARGS 16 /* max number of command args */
120 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
122 #define CFG_MEMTEST_START 0x10000000 /* memtest works on */
123 #define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
125 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
127 #define CFG_LOAD_ADDR 0x10000000 /* default load address */
129 /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
130 * DPLL1. This time is further subdivided by a local divisor.
132 #define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
133 #define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
134 #define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
136 /*-----------------------------------------------------------------------
139 * The stack sizes are set up in start.S using the settings below
141 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
142 #ifdef CONFIG_USE_IRQ
143 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
144 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
147 /*-----------------------------------------------------------------------
148 * Physical Memory Map
150 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
151 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
152 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
154 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
156 #define CFG_FLASH_BASE PHYS_FLASH_1
158 /*-----------------------------------------------------------------------
159 * FLASH and environment organization
161 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
162 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
163 #define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
164 /* addr of environment */
165 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
167 /* timeout values are in ticks */
168 #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
169 #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
171 #define CFG_ENV_IS_IN_FLASH 1
172 #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
173 #define CFG_ENV_OFFSET 0x20000 /* environment starts here */
175 #endif /* __CONFIG_H */