4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuration settings for the TI OMAP 1610 H2 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
33 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
34 #define CONFIG_OMAP 1 /* in a TI OMAP core */
35 #define CONFIG_OMAP1610 1 /* which is in a 1610 */
36 #define CONFIG_H2_OMAP1610 1 /* on an H2 Board */
37 #define CONFIG_MACH_OMAP_H2 /* Select board mach-type */
39 /* input clock of PLL */
40 /* the OMAP1610 H2 has 12MHz input clock */
41 #define CONFIG_SYS_CLK_FREQ 12000000
43 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
45 #define CONFIG_MISC_INIT_R
47 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS 1
49 #define CONFIG_INITRD_TAG 1
52 * Size of malloc() pool
54 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
55 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
60 #define CONFIG_DRIVER_LAN91C96
61 #define CONFIG_LAN91C96_BASE 0x04000300
62 #define CONFIG_LAN91C96_EXT_PHY
65 * NS16550 Configuration
68 #define CFG_NS16550_SERIAL
69 #define CFG_NS16550_REG_SIZE (-4)
70 #define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
71 #define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */
74 * select serial console configuration
76 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 H2 */
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_CONS_INDEX 1
81 #define CONFIG_BAUDRATE 115200
82 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
86 * Command line configuration.
88 #include <config_cmd_default.h>
90 #define CONFIG_CMD_DHCP
96 #define CONFIG_BOOTP_SUBNETMASK
97 #define CONFIG_BOOTP_GATEWAY
98 #define CONFIG_BOOTP_HOSTNAME
99 #define CONFIG_BOOTP_BOOTPATH
102 #include <configs/omap1510.h>
104 #define CONFIG_BOOTDELAY 3
105 #define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp"
106 #define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
107 #define CFG_AUTOLOAD "n" /* No autoload */
109 #if defined(CONFIG_CMD_KGDB)
110 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
111 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
115 * Miscellaneous configurable options
117 #define CFG_LONGHELP /* undef to save memory */
118 #define CFG_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */
119 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
120 /* Print Buffer Size */
121 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
122 #define CFG_MAXARGS 16 /* max number of command args */
123 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
125 #define CFG_MEMTEST_START 0x10000000 /* memtest works on */
126 #define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
128 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
130 #define CFG_LOAD_ADDR 0x10000000 /* default load address */
132 /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
133 * DPLL1. This time is further subdivided by a local divisor.
135 #define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
136 #define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
137 #define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
139 /*-----------------------------------------------------------------------
142 * The stack sizes are set up in start.S using the settings below
144 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
145 #ifdef CONFIG_USE_IRQ
146 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
147 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
150 /*-----------------------------------------------------------------------
151 * Physical Memory Map
153 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
154 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
155 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
157 #define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
158 #define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
160 #ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
163 extern unsigned long omap_flash_base; /* set in flash__init */
165 #define CFG_FLASH_BASE omap_flash_base
167 #elif defined(CONFIG_CS0_BOOT)
169 #define CFG_FLASH_BASE PHYS_FLASH_1_BM0
173 #define CFG_FLASH_BASE PHYS_FLASH_1_BM1
177 /*-----------------------------------------------------------------------
178 * FLASH and environment organization
180 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
181 #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
182 #define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
183 /* addr of environment */
184 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
186 /* timeout values are in ticks */
187 #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
188 #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
190 #define CFG_ENV_IS_IN_FLASH 1
191 #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
192 #define CFG_ENV_OFFSET 0x20000 /* environment starts here */
194 #endif /* __CONFIG_H */