2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the Boundary Devices Nitrogen6X
5 * and Freescale i.MX6Q Sabre Lite boards.
7 * SPDX-License-Identifier: GPL-2.0+
13 #include "mx6_common.h"
15 #define CONFIG_MACH_TYPE 3769
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
20 #define CONFIG_MISC_INIT_R
21 #define CONFIG_USBD_HS
22 #define CONFIG_USB_ETHER
23 #define CONFIG_USB_ETH_CDC
24 #define CONFIG_NETCONSOLE
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART2_BASE
30 #define CONFIG_MXC_SPI
31 #define CONFIG_SF_DEFAULT_BUS 0
32 #define CONFIG_SF_DEFAULT_CS 0
33 #define CONFIG_SF_DEFAULT_SPEED 25000000
34 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
38 #define CONFIG_SYS_I2C
39 #define CONFIG_SYS_I2C_MXC
40 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
41 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
42 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
43 #define CONFIG_SYS_I2C_SPEED 100000
44 #define CONFIG_I2C_EDID
47 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
48 #define CONFIG_SYS_FSL_USDHC_NUM 2
51 #define CONFIG_CMD_SATA
57 #ifdef CONFIG_CMD_SATA
58 #define CONFIG_DWC_AHSATA
59 #define CONFIG_SYS_SATA_MAX_DEVICE 1
60 #define CONFIG_DWC_AHSATA_PORT_ID 0
61 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
66 #define CONFIG_FEC_MXC
68 #define IMX_FEC_BASE ENET_BASE_ADDR
69 #define CONFIG_FEC_XCV_TYPE RGMII
70 #define CONFIG_ETHPRIME "FEC"
71 #define CONFIG_FEC_MXC_PHYADDR 6
73 #define CONFIG_PHY_MICREL
74 #define CONFIG_PHY_MICREL_KSZ9021
77 #define CONFIG_USB_HOST_ETHER
78 #define CONFIG_USB_ETHER_ASIX
79 #define CONFIG_USB_ETHER_MCS7830
80 #define CONFIG_USB_ETHER_SMSC95XX
81 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
82 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
83 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
84 #define CONFIG_MXC_USB_FLAGS 0
85 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
87 /* Framebuffer and LCD */
88 #define CONFIG_VIDEO_IPUV3
89 #define CONFIG_VIDEO_BMP_RLE8
90 #define CONFIG_SPLASH_SCREEN
91 #define CONFIG_SPLASH_SCREEN_ALIGN
92 #define CONFIG_VIDEO_BMP_GZIP
93 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024)
94 #define CONFIG_BMP_16BPP
95 #define CONFIG_IPUV3_CLK 260000000
96 #define CONFIG_IMX_HDMI
97 #define CONFIG_IMX_VIDEO_SKIP
99 #define CONFIG_PREBOOT ""
101 #ifdef CONFIG_CMD_SATA
102 #define CONFIG_DRIVE_SATA "sata "
104 #define CONFIG_DRIVE_SATA
107 #ifdef CONFIG_CMD_MMC
108 #define CONFIG_DRIVE_MMC "mmc "
110 #define CONFIG_DRIVE_MMC
113 #ifdef CONFIG_USB_STORAGE
114 #define CONFIG_DRIVE_USB "usb "
116 #define CONFIG_DRIVE_USB
119 #define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB
120 #define CONFIG_UMSDEVS CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
122 #if defined(CONFIG_SABRELITE)
123 #define CONFIG_EXTRA_ENV_SETTINGS \
124 "script=boot.scr\0" \
126 "console=ttymxc1\0" \
127 "fdt_high=0xffffffff\0" \
128 "initrd_high=0xffffffff\0" \
129 "fdt_file=imx6q-sabrelite.dtb\0" \
130 "fdt_addr=0x18000000\0" \
133 "usb_pgood_delay=2000\0" \
136 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
137 "mmcargs=setenv bootargs console=${console},${baudrate} " \
138 "root=${mmcroot}\0" \
140 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
141 "bootscript=echo Running bootscript from mmc ...; " \
143 "loaduimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
144 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
145 "mmcboot=echo Booting from mmc ...; " \
147 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
148 "if run loadfdt; then " \
149 "bootm ${loadaddr} - ${fdt_addr}; " \
151 "if test ${boot_fdt} = try; then " \
154 "echo WARN: Cannot load the DT; " \
160 "netargs=setenv bootargs console=${console},${baudrate} " \
162 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
163 "netboot=echo Booting from net ...; " \
165 "if test ${ip_dyn} = yes; then " \
166 "setenv get_cmd dhcp; " \
168 "setenv get_cmd tftp; " \
170 "${get_cmd} ${uimage}; " \
171 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
172 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
173 "bootm ${loadaddr} - ${fdt_addr}; " \
175 "if test ${boot_fdt} = try; then " \
178 "echo WARN: Cannot load the DT; " \
185 #define CONFIG_BOOTCOMMAND \
186 "for mmcdev in ${mmcdevs}; do " \
187 "mmc dev ${mmcdev}; " \
188 "if mmc rescan; then " \
189 "if run loadbootscript; then " \
192 "if run loaduimage; then " \
200 #define CONFIG_EXTRA_ENV_SETTINGS \
201 "bootdevs=" CONFIG_DRIVE_TYPES "\0" \
202 "umsdevs=" CONFIG_UMSDEVS "\0" \
203 "usb_pgood_delay=2000\0" \
204 "console=ttymxc1\0" \
205 "clearenv=if sf probe || sf probe || sf probe 1 ; then " \
206 "sf erase 0xc0000 0x2000 && " \
207 "echo restored environment to factory default ; fi\0" \
208 "bootcmd=for dtype in ${bootdevs}" \
210 "if itest.s \"xusb\" == \"x${dtype}\" ; then " \
213 "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
215 "${dtype} ${disk}:1 " \
218 "&& source 10008000 ; " \
221 "setenv stdout serial,vga ; " \
222 "echo ; echo 6x_bootscript not found ; " \
223 "echo ; echo serial console at 115200, 8N1 ; echo ; " \
224 "echo details at http://boundarydevices.com/6q_bootscript ; " \
225 "setenv stdout serial;" \
226 "setenv stdin serial,usbkbd;" \
227 "for dtype in ${umsdevs} ; do " \
228 "if itest.s sata == ${dtype}; then " \
229 "initcmd='sata init' ;" \
231 "initcmd='mmc rescan' ;" \
233 "for disk in 0 1 ; do " \
234 "if $initcmd && $dtype dev $disk ; then " \
235 "setenv stdout serial,vga; " \
236 "echo expose ${dtype} ${disk} " \
238 "ums 0 $dtype $disk ;" \
242 "setenv stdout serial,vga; " \
243 "echo no block devices found;" \
245 "initrd_high=0xffffffff\0" \
246 "upgradeu=for dtype in ${bootdevs}" \
248 "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
249 "load ${dtype} ${disk}:1 10008000 " \
251 "&& source 10008000 ; " \
256 /* Miscellaneous configurable options */
257 #define CONFIG_SYS_MEMTEST_START 0x10000000
258 #define CONFIG_SYS_MEMTEST_END 0x10010000
259 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
261 /* Physical Memory Map */
262 #define CONFIG_NR_DRAM_BANKS 1
263 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
265 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
266 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
267 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
269 #define CONFIG_SYS_INIT_SP_OFFSET \
270 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
271 #define CONFIG_SYS_INIT_SP_ADDR \
272 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
274 /* Environment organization */
275 #define CONFIG_ENV_SIZE (8 * 1024)
277 #if defined(CONFIG_SABRELITE)
278 #define CONFIG_ENV_IS_IN_MMC
280 #define CONFIG_ENV_IS_IN_SPI_FLASH
283 #if defined(CONFIG_ENV_IS_IN_MMC)
284 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
285 #define CONFIG_SYS_MMC_ENV_DEV 0
286 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
287 #define CONFIG_ENV_OFFSET (768 * 1024)
288 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
289 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
290 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
291 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
292 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
295 #define CONFIG_SYS_ALT_MEMTEST
300 #ifdef CONFIG_CMD_PCI
301 #define CONFIG_PCI_SCAN_SHOW
302 #define CONFIG_PCIE_IMX
305 #define CONFIG_USB_FUNCTION_MASS_STORAGE
307 #define CONFIG_USB_FUNCTION_FASTBOOT
308 #define CONFIG_CMD_FASTBOOT
309 #define CONFIG_ANDROID_BOOT_IMAGE
310 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
311 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
313 #endif /* __CONFIG_H */