2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the Boundary Devices Nitrogen6X
5 * and Freescale i.MX6Q Sabre Lite boards.
7 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_DISPLAY_CPUINFO
15 #define CONFIG_DISPLAY_BOARDINFO
17 #define CONFIG_MACH_TYPE 3769
19 #include <asm/arch/imx-regs.h>
20 #include <asm/imx-common/gpio.h>
22 #define CONFIG_CMDLINE_TAG
23 #define CONFIG_SETUP_MEMORY_TAGS
24 #define CONFIG_INITRD_TAG
25 #define CONFIG_REVISION_TAG
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_MISC_INIT_R
32 #define CONFIG_MXC_GPIO
34 #define CONFIG_CMD_FUSE
35 #ifdef CONFIG_CMD_FUSE
36 #define CONFIG_MXC_OCOTP
39 #define CONFIG_MXC_UART
40 #define CONFIG_MXC_UART_BASE UART2_BASE
44 #define CONFIG_SPI_FLASH
45 #define CONFIG_SPI_FLASH_SST
46 #define CONFIG_MXC_SPI
47 #define CONFIG_SF_DEFAULT_BUS 0
48 #define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
49 #define CONFIG_SF_DEFAULT_SPEED 25000000
50 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
54 #define CONFIG_CMD_I2C
55 #define CONFIG_I2C_MULTI_BUS
56 #define CONFIG_I2C_MXC
57 #define CONFIG_SYS_I2C_SPEED 100000
60 #define CONFIG_CMD_IMXOTP
61 #ifdef CONFIG_CMD_IMXOTP
62 #define CONFIG_IMX_OTP
63 #define IMX_OTP_BASE OCOTP_BASE_ADDR
64 #define IMX_OTP_ADDR_MAX 0x7F
65 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
66 #define IMX_OTPWRITE_ENABLED
70 #define CONFIG_FSL_ESDHC
71 #define CONFIG_FSL_USDHC
72 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
73 #define CONFIG_SYS_FSL_USDHC_NUM 2
76 #define CONFIG_CMD_MMC
77 #define CONFIG_GENERIC_MMC
78 #define CONFIG_BOUNCE_BUFFER
79 #define CONFIG_CMD_EXT2
80 #define CONFIG_CMD_FAT
81 #define CONFIG_DOS_PARTITION
84 #define CONFIG_CMD_SATA
90 #ifdef CONFIG_CMD_SATA
91 #define CONFIG_DWC_AHSATA
92 #define CONFIG_SYS_SATA_MAX_DEVICE 1
93 #define CONFIG_DWC_AHSATA_PORT_ID 0
94 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
99 #define CONFIG_CMD_PING
100 #define CONFIG_CMD_DHCP
101 #define CONFIG_CMD_MII
102 #define CONFIG_CMD_NET
103 #define CONFIG_FEC_MXC
105 #define IMX_FEC_BASE ENET_BASE_ADDR
106 #define CONFIG_FEC_XCV_TYPE RGMII
107 #define CONFIG_ETHPRIME "FEC"
108 #define CONFIG_FEC_MXC_PHYADDR 6
109 #define CONFIG_PHYLIB
110 #define CONFIG_PHY_MICREL
111 #define CONFIG_PHY_MICREL_KSZ9021
114 #define CONFIG_CMD_USB
115 #define CONFIG_CMD_FAT
116 #define CONFIG_USB_EHCI
117 #define CONFIG_USB_EHCI_MX6
118 #define CONFIG_USB_STORAGE
119 #define CONFIG_USB_HOST_ETHER
120 #define CONFIG_USB_ETHER_ASIX
121 #define CONFIG_USB_ETHER_SMSC95XX
122 #define CONFIG_MXC_USB_PORT 1
123 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
124 #define CONFIG_MXC_USB_FLAGS 0
126 /* Miscellaneous commands */
127 #define CONFIG_CMD_BMODE
128 #define CONFIG_CMD_SETEXPR
130 /* Framebuffer and LCD */
132 #define CONFIG_VIDEO_IPUV3
133 #define CONFIG_CFB_CONSOLE
134 #define CONFIG_VGA_AS_SINGLE_DEVICE
135 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
136 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
137 #define CONFIG_VIDEO_BMP_RLE8
138 #define CONFIG_SPLASH_SCREEN
139 #define CONFIG_BMP_16BPP
140 #define CONFIG_VIDEO_LOGO
141 #define CONFIG_IPUV3_CLK 260000000
142 #define CONFIG_CMD_HDMIDETECT
143 #define CONFIG_CONSOLE_MUX
145 /* allow to overwrite serial and ethaddr */
146 #define CONFIG_ENV_OVERWRITE
147 #define CONFIG_CONS_INDEX 1
148 #define CONFIG_BAUDRATE 115200
150 /* Command definition */
151 #include <config_cmd_default.h>
153 #undef CONFIG_CMD_IMLS
155 #define CONFIG_BOOTDELAY 1
157 #define CONFIG_PREBOOT ""
159 #define CONFIG_LOADADDR 0x12000000
160 #define CONFIG_SYS_TEXT_BASE 0x17800000
162 #ifdef CONFIG_CMD_SATA
163 #define CONFIG_DRIVE_SATA "sata "
165 #define CONFIG_DRIVE_SATA
168 #ifdef CONFIG_CMD_MMC
169 #define CONFIG_DRIVE_MMC "mmc "
171 #define CONFIG_DRIVE_MMC
174 #define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
176 #define CONFIG_EXTRA_ENV_SETTINGS \
177 "console=ttymxc1\0" \
178 "clearenv=if sf probe || sf probe || sf probe 1 ; then " \
179 "sf erase 0xc0000 0x2000 && " \
180 "echo restored environment to factory default ; fi\0" \
181 "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \
183 "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
184 "for fs in fat ext2 ; do " \
186 "${dtype} ${disk}:1 " \
189 "&& source 10008000 ; " \
193 "setenv stdout serial,vga ; " \
194 "echo ; echo 6x_bootscript not found ; " \
195 "echo ; echo serial console at 115200, 8N1 ; echo ; " \
196 "echo details at http://boundarydevices.com/6q_bootscript ; " \
197 "setenv stdout serial\0" \
198 "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \
200 "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
201 "for fs in fat ext2 ; do " \
202 "${fs}load ${dtype} ${disk}:1 10008000 " \
204 "&& source 10008000 ; " \
209 /* Miscellaneous configurable options */
210 #define CONFIG_SYS_LONGHELP
211 #define CONFIG_SYS_HUSH_PARSER
212 #define CONFIG_SYS_PROMPT "U-Boot > "
213 #define CONFIG_AUTO_COMPLETE
214 #define CONFIG_SYS_CBSIZE 1024
216 /* Print Buffer Size */
217 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
218 #define CONFIG_SYS_MAXARGS 16
219 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
221 #define CONFIG_SYS_MEMTEST_START 0x10000000
222 #define CONFIG_SYS_MEMTEST_END 0x10010000
223 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
225 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
226 #define CONFIG_SYS_HZ 1000
228 #define CONFIG_CMDLINE_EDITING
230 /* Physical Memory Map */
231 #define CONFIG_NR_DRAM_BANKS 1
232 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
234 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
235 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
236 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
238 #define CONFIG_SYS_INIT_SP_OFFSET \
239 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
240 #define CONFIG_SYS_INIT_SP_ADDR \
241 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
243 /* FLASH and environment organization */
244 #define CONFIG_SYS_NO_FLASH
246 #define CONFIG_ENV_SIZE (8 * 1024)
248 /* #define CONFIG_ENV_IS_IN_MMC */
249 #define CONFIG_ENV_IS_IN_SPI_FLASH
251 #if defined(CONFIG_ENV_IS_IN_MMC)
252 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
253 #define CONFIG_SYS_MMC_ENV_DEV 0
254 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
255 #define CONFIG_ENV_OFFSET (768 * 1024)
256 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
257 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
258 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
259 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
260 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
263 #define CONFIG_OF_LIBFDT
264 #define CONFIG_CMD_BOOTZ
266 #ifndef CONFIG_SYS_DCACHE_OFF
267 #define CONFIG_CMD_CACHE
270 #define CONFIG_CMD_BMP
272 #define CONFIG_CMD_TIME
273 #define CONFIG_SYS_ALT_MEMTEST
275 #define CONFIG_CMD_BOOTZ
276 #define CONFIG_SUPPORT_RAW_INITRD
277 #define CONFIG_CMD_FS_GENERIC
279 #endif /* __CONFIG_H */