1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Configuration settings for the Boundary Devices Nitrogen6X
6 * and Freescale i.MX6Q Sabre Lite boards.
12 #include "mx6_common.h"
14 #define CONFIG_MACH_TYPE 3769
16 #define CONFIG_USBD_HS
18 #define CONFIG_MXC_UART_BASE UART2_BASE
21 #define CONFIG_I2C_EDID
24 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
25 #define CONFIG_SYS_FSL_USDHC_NUM 2
30 #ifdef CONFIG_CMD_SATA
31 #define CONFIG_SYS_SATA_MAX_DEVICE 1
32 #define CONFIG_DWC_AHSATA_PORT_ID 0
33 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
37 #define CONFIG_FEC_MXC
38 #define IMX_FEC_BASE ENET_BASE_ADDR
39 #define CONFIG_FEC_XCV_TYPE RGMII
40 #define CONFIG_ETHPRIME "FEC"
41 #define CONFIG_FEC_MXC_PHYADDR 6
44 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
45 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
46 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
47 #define CONFIG_MXC_USB_FLAGS 0
49 /* Framebuffer and LCD */
50 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024)
51 #define CONFIG_IMX_HDMI
52 #define CONFIG_IMX_VIDEO_SKIP
55 #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
57 #define DISTRO_BOOT_DEV_MMC(func)
60 #ifdef CONFIG_CMD_SATA
61 #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0)
63 #define DISTRO_BOOT_DEV_SATA(func)
66 #ifdef CONFIG_USB_STORAGE
67 #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0)
69 #define DISTRO_BOOT_DEV_USB(func)
73 #define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na)
75 #define DISTRO_BOOT_DEV_PXE(func)
78 #ifdef CONFIG_CMD_DHCP
79 #define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na)
81 #define DISTRO_BOOT_DEV_DHCP(func)
84 #define BOOT_TARGET_DEVICES(func) \
85 DISTRO_BOOT_DEV_MMC(func) \
86 DISTRO_BOOT_DEV_SATA(func) \
87 DISTRO_BOOT_DEV_USB(func) \
88 DISTRO_BOOT_DEV_PXE(func) \
89 DISTRO_BOOT_DEV_DHCP(func)
91 #include <config_distro_bootcmd.h>
92 #include <linux/stringify.h>
94 #define CONFIG_EXTRA_ENV_SETTINGS \
96 "fdt_high=0xffffffff\0" \
97 "initrd_high=0xffffffff\0" \
98 "fdt_addr_r=0x18000000\0" \
99 "fdtfile=" __stringify(CONFIG_DEFAULT_DEVICE_TREE) ".dtb\0" \
100 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
101 "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
102 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
103 "ramdisk_addr_r=0x13000000\0" \
104 "ramdiskaddr=0x13000000\0" \
106 "usb_pgood_delay=2000\0" \
109 /* Miscellaneous configurable options */
111 /* Physical Memory Map */
112 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
114 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
115 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
116 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
118 #define CONFIG_SYS_INIT_SP_OFFSET \
119 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
120 #define CONFIG_SYS_INIT_SP_ADDR \
121 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
123 /* Environment organization */
128 #ifdef CONFIG_CMD_PCI
129 #define CONFIG_PCI_SCAN_SHOW
130 #define CONFIG_PCIE_IMX
133 #endif /* __CONFIG_H */