1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Configuration settings for the Boundary Devices Nitrogen6X
6 * and Freescale i.MX6Q Sabre Lite boards.
12 #include "mx6_common.h"
14 #define CONFIG_USBD_HS
16 #define CONFIG_MXC_UART_BASE UART2_BASE
19 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
20 #define CONFIG_SYS_FSL_USDHC_NUM 2
25 #ifdef CONFIG_CMD_SATA
26 #define CONFIG_DWC_AHSATA_PORT_ID 0
27 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
31 #define IMX_FEC_BASE ENET_BASE_ADDR
32 #define CONFIG_FEC_XCV_TYPE RGMII
33 #define CONFIG_FEC_MXC_PHYADDR 6
36 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
37 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
38 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
39 #define CONFIG_MXC_USB_FLAGS 0
41 /* Framebuffer and LCD */
42 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024)
43 #define CONFIG_IMX_HDMI
44 #define CONFIG_IMX_VIDEO_SKIP
47 #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
49 #define DISTRO_BOOT_DEV_MMC(func)
52 #ifdef CONFIG_CMD_SATA
53 #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0)
55 #define DISTRO_BOOT_DEV_SATA(func)
58 #ifdef CONFIG_USB_STORAGE
59 #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0)
61 #define DISTRO_BOOT_DEV_USB(func)
65 #define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na)
67 #define DISTRO_BOOT_DEV_PXE(func)
70 #ifdef CONFIG_CMD_DHCP
71 #define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na)
73 #define DISTRO_BOOT_DEV_DHCP(func)
76 #define BOOT_TARGET_DEVICES(func) \
77 DISTRO_BOOT_DEV_MMC(func) \
78 DISTRO_BOOT_DEV_SATA(func) \
79 DISTRO_BOOT_DEV_USB(func) \
80 DISTRO_BOOT_DEV_PXE(func) \
81 DISTRO_BOOT_DEV_DHCP(func)
83 #include <config_distro_bootcmd.h>
84 #include <linux/stringify.h>
86 #define CONFIG_EXTRA_ENV_SETTINGS \
88 "fdt_high=0xffffffff\0" \
89 "initrd_high=0xffffffff\0" \
90 "fdt_addr_r=0x18000000\0" \
91 "fdtfile=" __stringify(CONFIG_DEFAULT_DEVICE_TREE) ".dtb\0" \
92 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
93 "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
94 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
95 "ramdisk_addr_r=0x13000000\0" \
96 "ramdiskaddr=0x13000000\0" \
98 "usb_pgood_delay=2000\0" \
101 /* Miscellaneous configurable options */
103 /* Physical Memory Map */
104 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
106 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
107 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
108 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
110 #define CONFIG_SYS_INIT_SP_OFFSET \
111 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
112 #define CONFIG_SYS_INIT_SP_ADDR \
113 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
115 /* Environment organization */
120 #ifdef CONFIG_CMD_PCI
121 #define CONFIG_PCI_SCAN_SHOW
122 #define CONFIG_PCIE_IMX
125 #endif /* __CONFIG_H */