2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 #ifndef __CONFIGS_MXS_H__
20 #define __CONFIGS_MXS_H__
26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29 #error Select one of CONFIG_MX23 or CONFIG_MX28 !
32 #include <asm/arch/regs-base.h>
34 #if defined(CONFIG_MX23)
35 #include <asm/arch/iomux-mx23.h>
36 #elif defined(CONFIG_MX28)
37 #include <asm/arch/iomux-mx28.h>
43 #define CONFIG_SYS_GENERIC_BOARD
46 #define CONFIG_OF_LIBFDT
49 #define CONFIG_BOARD_EARLY_INIT_F
50 #define CONFIG_ARCH_MISC_INIT
54 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
55 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
56 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
57 #define CONFIG_SPL_LIBCOMMON_SUPPORT
58 #define CONFIG_SPL_LIBGENERIC_SUPPORT
59 #define CONFIG_SPL_GPIO_SUPPORT
62 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
63 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
64 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
66 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
67 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
68 #if defined(CONFIG_MX23)
69 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
70 #elif defined(CONFIG_MX28)
71 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
74 /* Point initial SP in SRAM so SPL can use it too. */
75 #define CONFIG_SYS_INIT_SP_OFFSET \
76 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
77 #define CONFIG_SYS_INIT_SP_ADDR \
78 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
81 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
82 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
83 * binary. In case there was more of this mess, 0x100 bytes are skipped.
85 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
86 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
87 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
89 * As for the SPL, we must avoid the first 4 KiB as well, but we load the
90 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
92 #define CONFIG_SYS_TEXT_BASE 0x40002000
93 #define CONFIG_SPL_TEXT_BASE 0x00001000
95 /* U-Boot general configuration */
96 #define CONFIG_SYS_LONGHELP
97 #ifndef CONFIG_SYS_PROMPT
99 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
100 #define CONFIG_SYS_PBSIZE \
101 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
102 /* Print buffer size */
103 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
104 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
105 /* Boot argument buffer size */
106 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
107 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
108 #define CONFIG_CMDLINE_EDITING /* Command history etc */
109 #define CONFIG_SYS_HUSH_PARSER
110 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
113 #define CONFIG_CMDLINE_TAG
114 #define CONFIG_SETUP_MEMORY_TAGS
121 #define CONFIG_APBH_DMA
124 #define CONFIG_MXS_GPIO
127 * DUART Serial Driver.
128 * Conflicts with AUART driver which can be set by board.
130 #ifndef CONFIG_MXS_AUART
131 #define CONFIG_PL011_SERIAL
132 #define CONFIG_PL011_CLOCK 24000000
133 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
134 #define CONFIG_CONS_INDEX 0
136 /* Default baudrate can be overriden by board! */
137 #ifndef CONFIG_BAUDRATE
138 #define CONFIG_BAUDRATE 115200
141 /* FEC Ethernet on SoC */
142 #ifdef CONFIG_FEC_MXC
144 #ifndef CONFIG_ETHPRIME
145 #define CONFIG_ETHPRIME "FEC0"
147 #ifndef CONFIG_FEC_XCV_TYPE
148 #define CONFIG_FEC_XCV_TYPE RMII
153 #ifdef CONFIG_CMD_I2C
154 #define CONFIG_I2C_MXS
155 #define CONFIG_HARD_I2C
156 #ifndef CONFIG_SYS_I2C_SPEED
157 #define CONFIG_SYS_I2C_SPEED 400000
163 #define CONFIG_CFB_CONSOLE
164 #define CONFIG_VIDEO_MXS
165 #define CONFIG_VIDEO_SW_CURSOR
166 #define CONFIG_VGA_AS_SINGLE_DEVICE
167 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
171 #ifdef CONFIG_CMD_MMC
173 #define CONFIG_GENERIC_MMC
174 #define CONFIG_BOUNCE_BUFFER
175 #define CONFIG_MXS_MMC
179 #ifdef CONFIG_CMD_NAND
180 #define CONFIG_NAND_MXS
181 #define CONFIG_SYS_MAX_NAND_DEVICE 1
182 #define CONFIG_SYS_NAND_BASE 0x60000000
183 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
187 #ifdef CONFIG_CMD_FUSE
188 #define CONFIG_MXS_OCOTP
192 #ifdef CONFIG_CMD_SPI
193 #define CONFIG_HARD_SPI
194 #define CONFIG_MXS_SPI
195 #define CONFIG_SPI_HALF_DUPLEX
199 #ifdef CONFIG_CMD_USB
200 #define CONFIG_USB_EHCI
201 #define CONFIG_USB_EHCI_MXS
202 #define CONFIG_EHCI_IS_TDI
205 #endif /* __CONFIGS_MXS_H__ */