1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX7ULP EVK board.
8 #ifndef __MX7ULP_EVK_CONFIG_H
9 #define __MX7ULP_EVK_CONFIG_H
11 #include <linux/sizes.h>
12 #include <asm/arch/imx-regs.h>
14 #define CONFIG_BOARD_POSTCLK_INIT
15 #define CONFIG_SYS_BOOTM_LEN 0x1000000
17 #define SRC_BASE_ADDR CMC1_RBASE
18 #define IRAM_BASE_ADDR OCRAM_0_BASE
19 #define IOMUXC_BASE_ADDR IOMUXC1_RBASE
21 #define CONFIG_SYS_FSL_USDHC_NUM 1
23 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
24 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
25 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
26 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
27 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
29 /* Using ULP WDOG for reset */
30 #define WDOG_BASE_ADDR WDG1_RBASE
32 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
34 #define CONFIG_INITRD_TAG
35 #define CONFIG_CMDLINE_TAG
36 #define CONFIG_SETUP_MEMORY_TAGS
37 /*#define CONFIG_REVISION_TAG*/
39 /* Size of malloc() pool */
40 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
42 #define CONFIG_BOARD_EARLY_INIT_F
45 #define LPUART_BASE LPUART4_RBASE
47 /* allow to overwrite serial and ethaddr */
48 #define CONFIG_ENV_OVERWRITE
49 #define CONFIG_BAUDRATE 115200
51 #define CONFIG_SYS_CACHELINE_SIZE 64
53 /* Miscellaneous configurable options */
54 #define CONFIG_SYS_PROMPT "=> "
55 #define CONFIG_SYS_CBSIZE 512
57 #define CONFIG_SYS_MAXARGS 256
59 /* Physical Memory Map */
61 #define PHYS_SDRAM 0x60000000
62 #define PHYS_SDRAM_SIZE SZ_1G
63 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
64 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
66 #define CONFIG_LOADADDR 0x60800000
68 #define CONFIG_SYS_MEMTEST_END 0x9E000000
70 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "fdt_high=0xffffffff\0" \
75 "initrd_high=0xffffffff\0" \
76 "fdt_file=imx7ulp-evk.dtb\0" \
77 "fdt_addr=0x63000000\0" \
79 "earlycon=lpuart32,0x402D0010\0" \
81 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
82 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
83 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
84 "mmcautodetect=yes\0" \
85 "mmcargs=setenv bootargs console=${console},${baudrate} " \
88 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
89 "bootscript=echo Running bootscript from mmc ...; " \
91 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
92 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
93 "mmcboot=echo Booting from mmc ...; " \
95 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
96 "if run loadfdt; then " \
97 "bootz ${loadaddr} - ${fdt_addr}; " \
99 "if test ${boot_fdt} = try; then " \
102 "echo WARN: Cannot load the DT; " \
108 "netargs=setenv bootargs console=${console},${baudrate} " \
110 "ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
111 "netboot=echo Booting from net ...; " \
113 "if test ${ip_dyn} = yes; then " \
114 "setenv get_cmd dhcp; " \
116 "setenv get_cmd tftp; " \
119 "${get_cmd} ${image}; " \
120 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
121 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
122 "bootz ${loadaddr} - ${fdt_addr}; " \
124 "if test ${boot_fdt} = try; then " \
127 "echo WARN: Cannot load the DT; " \
134 #define CONFIG_BOOTCOMMAND \
135 "mmc dev ${mmcdev}; if mmc rescan; then " \
136 "if run loadbootscript; then " \
139 "if run loadimage; then " \
145 #define CONFIG_SYS_HZ 1000
146 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
148 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
149 #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
151 #define CONFIG_SYS_INIT_SP_OFFSET \
152 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
153 #define CONFIG_SYS_INIT_SP_ADDR \
154 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
156 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
157 #define CONFIG_CMD_CACHE
160 #endif /* __CONFIG_H */