1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX7D SABRESD board.
8 #ifndef __MX7D_SABRESD_CONFIG_H
9 #define __MX7D_SABRESD_CONFIG_H
11 #include "mx7_common.h"
13 #define PHYS_SDRAM_SIZE SZ_1G
15 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
21 #define CONFIG_FEC_MXC
22 #define CONFIG_FEC_XCV_TYPE RGMII
23 #define CONFIG_ETHPRIME "FEC"
24 #define CONFIG_FEC_MXC_PHYADDR 0
26 #define CONFIG_PHY_BROADCOM
28 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
31 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
34 #define CONFIG_SYS_I2C_MXC
35 #define CONFIG_SYS_I2C_SPEED 100000
37 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
39 #ifdef CONFIG_IMX_BOOTAUX
40 /* Set to QSPI1 A flash at default */
41 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
43 #define UPDATE_M4_ENV \
44 "m4image=m4_qspi.bin\0" \
45 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
46 "update_m4_from_sd=" \
47 "if sf probe 0:0; then " \
48 "if run loadm4image; then " \
49 "setexpr fw_sz ${filesize} + 0xffff; " \
50 "setexpr fw_sz ${fw_sz} / 0x10000; " \
51 "setexpr fw_sz ${fw_sz} * 0x10000; " \
52 "sf erase 0x0 ${fw_sz}; " \
53 "sf write ${loadaddr} 0x0 ${filesize}; " \
56 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
58 #define UPDATE_M4_ENV ""
61 #define CONFIG_MFG_ENV_SETTINGS \
62 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
64 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
65 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
66 "g_mass_storage.iSerialNumber=\"\" "\
69 "initrd_addr=0x83800000\0" \
70 "initrd_high=0xffffffff\0" \
71 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
73 #define CONFIG_DFU_ENV_SETTINGS \
74 "dfu_alt_info=image raw 0 0x800000;"\
75 "u-boot raw 0 0x4000;"\
79 #define CONFIG_EXTRA_ENV_SETTINGS \
81 CONFIG_MFG_ENV_SETTINGS \
82 CONFIG_DFU_ENV_SETTINGS \
86 "fdt_high=0xffffffff\0" \
87 "initrd_high=0xffffffff\0" \
88 "fdt_file=imx7d-sdb.dtb\0" \
89 "fdt_addr=0x83000000\0" \
92 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
93 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
94 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
95 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
96 "mmcautodetect=yes\0" \
97 "mmcargs=setenv bootargs console=${console},${baudrate} " \
100 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
101 "bootscript=echo Running bootscript from mmc ...; " \
103 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
104 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
105 "mmcboot=echo Booting from mmc ...; " \
107 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
108 "if run loadfdt; then " \
109 "bootz ${loadaddr} - ${fdt_addr}; " \
111 "if test ${boot_fdt} = try; then " \
114 "echo WARN: Cannot load the DT; " \
120 "netargs=setenv bootargs console=${console},${baudrate} " \
122 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
123 "netboot=echo Booting from net ...; " \
125 "if test ${ip_dyn} = yes; then " \
126 "setenv get_cmd dhcp; " \
128 "setenv get_cmd tftp; " \
130 "${get_cmd} ${image}; " \
131 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
132 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
133 "bootz ${loadaddr} - ${fdt_addr}; " \
135 "if test ${boot_fdt} = try; then " \
138 "echo WARN: Cannot load the DT; " \
145 #define CONFIG_BOOTCOMMAND \
146 "mmc dev ${mmcdev};" \
147 "mmc dev ${mmcdev}; if mmc rescan; then " \
148 "if run loadbootscript; then " \
151 "if run loadimage; then " \
153 "else run netboot; " \
156 "else run netboot; fi"
158 #define CONFIG_SYS_MEMTEST_START 0x80000000
159 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
162 #define CONFIG_SYS_HZ 1000
164 /* Physical Memory Map */
165 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
167 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
168 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
169 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
171 #define CONFIG_SYS_INIT_SP_OFFSET \
172 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
173 #define CONFIG_SYS_INIT_SP_ADDR \
174 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
176 /* environment organization */
177 #define CONFIG_ENV_SIZE SZ_8K
180 * If want to use nand, define CONFIG_NAND_MXS and rework board
181 * to support nand, since emmc has pin conflicts with nand
183 #ifdef CONFIG_NAND_MXS
185 #define CONFIG_SYS_MAX_NAND_DEVICE 1
186 #define CONFIG_SYS_NAND_BASE 0x40000000
187 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
188 #define CONFIG_SYS_NAND_ONFI_DETECTION
190 /* DMA stuff, needed for GPMI/MXS NAND support */
193 #define CONFIG_ENV_OFFSET (12 * SZ_64K)
194 #ifdef CONFIG_NAND_MXS
195 #define CONFIG_SYS_FSL_USDHC_NUM 1
197 #define CONFIG_SYS_FSL_USDHC_NUM 2
200 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
201 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
202 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
205 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
207 #define CONFIG_IMX_THERMAL
209 #define CONFIG_USBD_HS
212 #define CONFIG_VIDEO_MXS
213 #define CONFIG_VIDEO_LOGO
214 #define CONFIG_SPLASH_SCREEN
215 #define CONFIG_SPLASH_SCREEN_ALIGN
216 #define CONFIG_BMP_16BPP
217 #define CONFIG_VIDEO_BMP_RLE8
218 #define CONFIG_VIDEO_BMP_LOGO
221 #ifdef CONFIG_FSL_QSPI
222 #define CONFIG_SYS_FSL_QSPI_AHB
223 #define FSL_QSPI_FLASH_NUM 1
224 #define FSL_QSPI_FLASH_SIZE SZ_64M
225 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
226 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
229 #endif /* __CONFIG_H */