mx7dsabre: Fix ramdisk_addr* for distro boot
[platform/kernel/u-boot.git] / include / configs / mx7dsabresd.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
4  *
5  * Configuration settings for the Freescale i.MX7D SABRESD board.
6  */
7
8 #ifndef __MX7D_SABRESD_CONFIG_H
9 #define __MX7D_SABRESD_CONFIG_H
10
11 #include "mx7_common.h"
12
13 #define PHYS_SDRAM_SIZE                 SZ_1G
14
15 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
16
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN           (32 * SZ_1M)
19
20 /* MMC Config*/
21 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
22
23 /* I2C configs */
24 #define CONFIG_SYS_I2C_MXC
25 #define CONFIG_SYS_I2C_SPEED            100000
26
27 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
28
29 #ifdef CONFIG_IMX_BOOTAUX
30 /* Set to QSPI1 A flash at default */
31 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
32
33 #define UPDATE_M4_ENV \
34         "m4image=m4_qspi.bin\0" \
35         "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
36         "update_m4_from_sd=" \
37                 "if sf probe 0:0; then " \
38                         "if run loadm4image; then " \
39                                 "setexpr fw_sz ${filesize} + 0xffff; " \
40                                 "setexpr fw_sz ${fw_sz} / 0x10000; "    \
41                                 "setexpr fw_sz ${fw_sz} * 0x10000; "    \
42                                 "sf erase 0x0 ${fw_sz}; " \
43                                 "sf write ${loadaddr} 0x0 ${filesize}; " \
44                         "fi; " \
45                 "fi\0" \
46         "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
47 #else
48 #define UPDATE_M4_ENV ""
49 #endif
50
51 #define CONFIG_MFG_ENV_SETTINGS \
52         "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
53                 "rdinit=/linuxrc " \
54                 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
55                 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
56                 "g_mass_storage.iSerialNumber=\"\" "\
57                 "clk_ignore_unused "\
58                 "\0" \
59         "initrd_addr=0x83800000\0" \
60         "initrd_high=0xffffffff\0" \
61         "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
62
63 #define CONFIG_DFU_ENV_SETTINGS \
64         "dfu_alt_info=image raw 0 0x800000;"\
65                 "u-boot raw 0 0x4000;"\
66                 "bootimg part 0 1;"\
67                 "rootfs part 0 2\0" \
68
69 #define CONFIG_EXTRA_ENV_SETTINGS \
70         UPDATE_M4_ENV \
71         CONFIG_MFG_ENV_SETTINGS \
72         CONFIG_DFU_ENV_SETTINGS \
73         "script=boot.scr\0" \
74         "image=zImage\0" \
75         "console=ttymxc0\0" \
76         "fdt_high=0xffffffff\0" \
77         "finduuid=part uuid mmc 0:1 uuid\0" \
78         "initrd_high=0xffffffff\0" \
79         "fdtfile=imx7d-sdb.dtb\0" \
80         "fdt_addr=0x83000000\0" \
81         "fdt_addr_r=0x83000000\0" \
82         "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
83         "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
84         "ramdisk_addr_r=0x83100000\0" \
85         "ramdiskaddr=0x83100000\0" \
86         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
87         "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
88         BOOTENV
89
90 #define BOOT_TARGET_DEVICES(func) \
91         func(MMC, mmc, 0) \
92         func(DHCP, dhcp, na) \
93         func(PXE, pxe, na)
94
95 #include <config_distro_bootcmd.h>
96
97 #define CONFIG_SYS_MEMTEST_START        0x80000000
98 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x20000000)
99
100 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
101 #define CONFIG_SYS_HZ                   1000
102
103 /* Physical Memory Map */
104 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
105
106 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
107 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
108 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
109
110 #define CONFIG_SYS_INIT_SP_OFFSET \
111         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
112 #define CONFIG_SYS_INIT_SP_ADDR \
113         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
114
115 /* environment organization */
116
117 /*
118  * If want to use nand, define CONFIG_NAND_MXS and rework board
119  * to support nand, since emmc has pin conflicts with nand
120  */
121 #ifdef CONFIG_NAND_MXS
122 /* NAND stuff */
123 #define CONFIG_SYS_MAX_NAND_DEVICE      1
124 #define CONFIG_SYS_NAND_BASE            0x40000000
125 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
126 #define CONFIG_SYS_NAND_ONFI_DETECTION
127
128 /* DMA stuff, needed for GPMI/MXS NAND support */
129 #endif
130
131 #ifdef CONFIG_NAND_MXS
132 #define CONFIG_SYS_FSL_USDHC_NUM        1
133 #else
134 #define CONFIG_SYS_FSL_USDHC_NUM        2
135 #endif
136
137 #define CONFIG_SYS_MMC_ENV_DEV          0   /* USDHC1 */
138 #define CONFIG_SYS_MMC_ENV_PART         0       /* user area */
139
140 /* USB Configs */
141 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
142
143 #define CONFIG_IMX_THERMAL
144
145 #define CONFIG_USBD_HS
146
147 #ifdef CONFIG_VIDEO
148 #define CONFIG_VIDEO_MXS
149 #define CONFIG_VIDEO_LOGO
150 #define CONFIG_SPLASH_SCREEN
151 #define CONFIG_SPLASH_SCREEN_ALIGN
152 #define CONFIG_BMP_16BPP
153 #define CONFIG_VIDEO_BMP_RLE8
154 #define CONFIG_VIDEO_BMP_LOGO
155 #endif
156
157 #ifdef CONFIG_FSL_QSPI
158 #define CONFIG_SYS_FSL_QSPI_AHB
159 #define FSL_QSPI_FLASH_NUM              1
160 #define FSL_QSPI_FLASH_SIZE             SZ_64M
161 #define QSPI0_BASE_ADDR                 QSPI1_IPS_BASE_ADDR
162 #define QSPI0_AMBA_BASE                 QSPI0_ARB_BASE_ADDR
163 #endif
164
165 #endif  /* __CONFIG_H */