1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX7D SABRESD board.
8 #ifndef __MX7D_SABRESD_CONFIG_H
9 #define __MX7D_SABRESD_CONFIG_H
11 #include "mx7_common.h"
13 #define PHYS_SDRAM_SIZE SZ_1G
15 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
21 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
24 #define CONFIG_SYS_I2C_MXC
26 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
28 #ifdef CONFIG_IMX_BOOTAUX
29 /* Set to QSPI1 A flash at default */
30 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
32 #define UPDATE_M4_ENV \
33 "m4image=m4_qspi.bin\0" \
34 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
35 "update_m4_from_sd=" \
36 "if sf probe 0:0; then " \
37 "if run loadm4image; then " \
38 "setexpr fw_sz ${filesize} + 0xffff; " \
39 "setexpr fw_sz ${fw_sz} / 0x10000; " \
40 "setexpr fw_sz ${fw_sz} * 0x10000; " \
41 "sf erase 0x0 ${fw_sz}; " \
42 "sf write ${loadaddr} 0x0 ${filesize}; " \
45 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
47 #define UPDATE_M4_ENV ""
50 #define CONFIG_MFG_ENV_SETTINGS \
51 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
53 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
54 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
55 "g_mass_storage.iSerialNumber=\"\" "\
58 "initrd_addr=0x83800000\0" \
59 "initrd_high=0xffffffff\0" \
60 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
62 #define CONFIG_DFU_ENV_SETTINGS \
63 "dfu_alt_info=image raw 0 0x800000;"\
64 "u-boot raw 0 0x4000;"\
68 #define CONFIG_EXTRA_ENV_SETTINGS \
70 CONFIG_MFG_ENV_SETTINGS \
71 CONFIG_DFU_ENV_SETTINGS \
75 "fdt_high=0xffffffff\0" \
76 "finduuid=part uuid mmc 0:1 uuid\0" \
77 "initrd_high=0xffffffff\0" \
78 "fdtfile=imx7d-sdb.dtb\0" \
79 "fdt_addr=0x83000000\0" \
80 "fdt_addr_r=0x83000000\0" \
81 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
82 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
83 "ramdisk_addr_r=0x83100000\0" \
84 "ramdiskaddr=0x83100000\0" \
85 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
86 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
89 #define BOOT_TARGET_DEVICES(func) \
91 func(DHCP, dhcp, na) \
94 #include <config_distro_bootcmd.h>
96 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
97 #define CONFIG_SYS_HZ 1000
99 /* Physical Memory Map */
100 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
102 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
103 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
104 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
106 #define CONFIG_SYS_INIT_SP_OFFSET \
107 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
108 #define CONFIG_SYS_INIT_SP_ADDR \
109 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
111 /* environment organization */
114 * If want to use nand, define CONFIG_NAND_MXS and rework board
115 * to support nand, since emmc has pin conflicts with nand
117 #ifdef CONFIG_NAND_MXS
119 #define CONFIG_SYS_MAX_NAND_DEVICE 1
120 #define CONFIG_SYS_NAND_BASE 0x40000000
121 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
122 #define CONFIG_SYS_NAND_ONFI_DETECTION
124 /* DMA stuff, needed for GPMI/MXS NAND support */
127 #ifdef CONFIG_NAND_MXS
128 #define CONFIG_SYS_FSL_USDHC_NUM 1
130 #define CONFIG_SYS_FSL_USDHC_NUM 2
134 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
136 #define CONFIG_USBD_HS
139 #define CONFIG_VIDEO_MXS
140 #define CONFIG_VIDEO_LOGO
141 #define CONFIG_VIDEO_BMP_LOGO
144 #endif /* __CONFIG_H */