1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX7D SABRESD board.
8 #ifndef __MX7D_SABRESD_CONFIG_H
9 #define __MX7D_SABRESD_CONFIG_H
11 #include "mx7_common.h"
13 #define PHYS_SDRAM_SIZE SZ_1G
15 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
18 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
20 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
22 #ifdef CONFIG_IMX_BOOTAUX
23 /* Set to QSPI1 A flash at default */
24 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
26 #define UPDATE_M4_ENV \
27 "m4image=m4_qspi.bin\0" \
28 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
29 "update_m4_from_sd=" \
30 "if sf probe 0:0; then " \
31 "if run loadm4image; then " \
32 "setexpr fw_sz ${filesize} + 0xffff; " \
33 "setexpr fw_sz ${fw_sz} / 0x10000; " \
34 "setexpr fw_sz ${fw_sz} * 0x10000; " \
35 "sf erase 0x0 ${fw_sz}; " \
36 "sf write ${loadaddr} 0x0 ${filesize}; " \
39 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
41 #define UPDATE_M4_ENV ""
44 #define CONFIG_MFG_ENV_SETTINGS \
45 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
47 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
48 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
49 "g_mass_storage.iSerialNumber=\"\" "\
52 "initrd_addr=0x83800000\0" \
53 "initrd_high=0xffffffff\0" \
54 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
56 #define CONFIG_DFU_ENV_SETTINGS \
57 "dfu_alt_info=image raw 0 0x800000;"\
58 "u-boot raw 0 0x4000;"\
62 #define CONFIG_EXTRA_ENV_SETTINGS \
64 CONFIG_MFG_ENV_SETTINGS \
65 CONFIG_DFU_ENV_SETTINGS \
69 "fdt_high=0xffffffff\0" \
70 "finduuid=part uuid mmc 0:1 uuid\0" \
71 "initrd_high=0xffffffff\0" \
72 "fdtfile=imx7d-sdb.dtb\0" \
73 "fdt_addr=0x83000000\0" \
74 "fdt_addr_r=0x83000000\0" \
75 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
76 "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
77 "ramdisk_addr_r=0x83100000\0" \
78 "ramdiskaddr=0x83100000\0" \
79 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
80 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
83 #define BOOT_TARGET_DEVICES(func) \
85 func(DHCP, dhcp, na) \
88 #include <config_distro_bootcmd.h>
90 #define CONFIG_SYS_HZ 1000
92 /* Physical Memory Map */
93 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
95 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
96 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
97 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
99 #define CONFIG_SYS_INIT_SP_OFFSET \
100 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
101 #define CONFIG_SYS_INIT_SP_ADDR \
102 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
104 /* environment organization */
107 * If want to use nand, define CONFIG_NAND_MXS and rework board
108 * to support nand, since emmc has pin conflicts with nand
110 #ifdef CONFIG_NAND_MXS
112 #define CONFIG_SYS_MAX_NAND_DEVICE 1
113 #define CONFIG_SYS_NAND_BASE 0x40000000
114 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
115 #define CONFIG_SYS_NAND_ONFI_DETECTION
117 /* DMA stuff, needed for GPMI/MXS NAND support */
120 #ifdef CONFIG_NAND_MXS
121 #define CONFIG_SYS_FSL_USDHC_NUM 1
123 #define CONFIG_SYS_FSL_USDHC_NUM 2
127 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
129 #define CONFIG_USBD_HS
132 #define CONFIG_VIDEO_MXS
133 #define CONFIG_VIDEO_LOGO
134 #define CONFIG_VIDEO_BMP_LOGO
137 #endif /* __CONFIG_H */