2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 #include <asm/imx-common/gpio.h>
17 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
20 #define CONFIG_SPL_LIBCOMMON_SUPPORT
21 #define CONFIG_SPL_MMC_SUPPORT
24 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
26 #define CONFIG_ROM_UNIFIED_SECTIONS
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
30 /* Size of malloc() pool */
31 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
33 #define CONFIG_BOARD_EARLY_INIT_F
34 #define CONFIG_BOARD_LATE_INIT
36 #define CONFIG_MXC_UART
37 #define CONFIG_MXC_UART_BASE UART1_BASE
40 #ifdef CONFIG_FSL_USDHC
41 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
43 /* NAND pin conflicts with usdhc2 */
44 #ifdef CONFIG_NAND_MXS
45 #define CONFIG_SYS_FSL_USDHC_NUM 1
47 #define CONFIG_SYS_FSL_USDHC_NUM 2
50 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
53 #undef CONFIG_BOOTM_NETBSD
54 #undef CONFIG_BOOTM_PLAN9
55 #undef CONFIG_BOOTM_RTEMS
57 #undef CONFIG_CMD_EXPORTENV
58 #undef CONFIG_CMD_IMPORTENV
61 #define CONFIG_CMD_I2C
63 #define CONFIG_SYS_I2C
64 #define CONFIG_SYS_I2C_MXC
65 #define CONFIG_SYS_I2C_SPEED 100000
67 /* PMIC only for 9X9 EVK */
69 #define CONFIG_POWER_I2C
70 #define CONFIG_POWER_PFUZE3000
71 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
74 #undef CONFIG_CMD_IMLS
76 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
78 #define CONFIG_EXTRA_ENV_SETTINGS \
82 "fdt_high=0xffffffff\0" \
83 "initrd_high=0xffffffff\0" \
84 "fdt_file=undefined\0" \
85 "fdt_addr=0x83000000\0" \
88 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
89 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
90 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
91 "mmcautodetect=yes\0" \
92 "mmcargs=setenv bootargs console=${console},${baudrate} " \
95 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
96 "bootscript=echo Running bootscript from mmc ...; " \
98 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
99 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
100 "mmcboot=echo Booting from mmc ...; " \
102 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
103 "if run loadfdt; then " \
104 "bootz ${loadaddr} - ${fdt_addr}; " \
106 "if test ${boot_fdt} = try; then " \
109 "echo WARN: Cannot load the DT; " \
115 "netargs=setenv bootargs console=${console},${baudrate} " \
117 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
118 "netboot=echo Booting from net ...; " \
120 "if test ${ip_dyn} = yes; then " \
121 "setenv get_cmd dhcp; " \
123 "setenv get_cmd tftp; " \
125 "${get_cmd} ${image}; " \
126 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
127 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
128 "bootz ${loadaddr} - ${fdt_addr}; " \
130 "if test ${boot_fdt} = try; then " \
133 "echo WARN: Cannot load the DT; " \
140 "if test $fdt_file = undefined; then " \
141 "if test $board_name = EVK && test $board_rev = 9X9; then " \
142 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
143 "if test $board_name = EVK && test $board_rev = 14X14; then " \
144 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
145 "if test $fdt_file = undefined; then " \
146 "echo WARNING: Could not determine dtb to use; fi; " \
149 #define CONFIG_BOOTCOMMAND \
151 "mmc dev ${mmcdev};" \
152 "mmc dev ${mmcdev}; if mmc rescan; then " \
153 "if run loadbootscript; then " \
156 "if run loadimage; then " \
158 "else run netboot; " \
161 "else run netboot; fi"
163 /* Miscellaneous configurable options */
164 /* Print Buffer Size */
165 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
167 #define CONFIG_CMD_MEMTEST
168 #define CONFIG_SYS_MEMTEST_START 0x80000000
169 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
171 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
172 #define CONFIG_SYS_HZ 1000
174 #define CONFIG_CMDLINE_EDITING
175 #define CONFIG_STACKSIZE SZ_128K
177 /* Physical Memory Map */
178 #define CONFIG_NR_DRAM_BANKS 1
179 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
181 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
182 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
183 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
185 #define CONFIG_SYS_INIT_SP_OFFSET \
186 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
187 #define CONFIG_SYS_INIT_SP_ADDR \
188 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
190 /* FLASH and environment organization */
191 #define CONFIG_SYS_NO_FLASH
193 #define CONFIG_ENV_SIZE SZ_8K
194 #define CONFIG_ENV_IS_IN_MMC
195 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
196 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
197 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
198 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
200 #define CONFIG_OF_LIBFDT
201 #define CONFIG_CMD_BOOTZ
202 #define CONFIG_CMD_BMODE
204 #ifndef CONFIG_SYS_DCACHE_OFF
205 #define CONFIG_CMD_CACHE
208 #define CONFIG_FSL_QSPI
209 #ifdef CONFIG_FSL_QSPI
210 #define CONFIG_CMD_SF
211 #define CONFIG_SPI_FLASH
212 #define CONFIG_SPI_FLASH_STMICRO
213 #define CONFIG_SPI_FLASH_BAR
214 #define CONFIG_SF_DEFAULT_BUS 0
215 #define CONFIG_SF_DEFAULT_CS 0
216 #define CONFIG_SF_DEFAULT_SPEED 40000000
217 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
218 #define FSL_QSPI_FLASH_NUM 1
219 #define FSL_QSPI_FLASH_SIZE SZ_32M
223 #define CONFIG_CMD_USB
224 #ifdef CONFIG_CMD_USB
225 #define CONFIG_USB_EHCI
226 #define CONFIG_USB_EHCI_MX6
227 #define CONFIG_USB_STORAGE
228 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
229 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
230 #define CONFIG_MXC_USB_FLAGS 0
231 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
234 #ifdef CONFIG_CMD_NET
235 #define CONFIG_FEC_MXC
237 #define CONFIG_FEC_ENET_DEV 1
239 #if (CONFIG_FEC_ENET_DEV == 0)
240 #define IMX_FEC_BASE ENET_BASE_ADDR
241 #define CONFIG_FEC_MXC_PHYADDR 0x2
242 #define CONFIG_FEC_XCV_TYPE RMII
243 #elif (CONFIG_FEC_ENET_DEV == 1)
244 #define IMX_FEC_BASE ENET2_BASE_ADDR
245 #define CONFIG_FEC_MXC_PHYADDR 0x1
246 #define CONFIG_FEC_XCV_TYPE RMII
248 #define CONFIG_ETHPRIME "FEC"
250 #define CONFIG_PHYLIB
251 #define CONFIG_PHY_MICREL
252 #define CONFIG_FEC_DMA_MINALIGN 64
255 #define CONFIG_IMX_THERMAL