2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
11 #include <asm/arch/imx-regs.h>
12 #include <linux/sizes.h>
13 #include "mx6_common.h"
14 #include <asm/imx-common/gpio.h>
16 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
21 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART1_BASE
30 #ifdef CONFIG_FSL_USDHC
31 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
33 /* NAND pin conflicts with usdhc2 */
34 #ifdef CONFIG_NAND_MXS
35 #define CONFIG_SYS_FSL_USDHC_NUM 1
37 #define CONFIG_SYS_FSL_USDHC_NUM 2
44 #define CONFIG_SYS_I2C
45 #define CONFIG_SYS_I2C_MXC
46 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48 #define CONFIG_SYS_I2C_SPEED 100000
50 /* PMIC only for 9X9 EVK */
52 #define CONFIG_POWER_I2C
53 #define CONFIG_POWER_PFUZE3000
54 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
57 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
59 #define CONFIG_EXTRA_ENV_SETTINGS \
63 "fdt_high=0xffffffff\0" \
64 "initrd_high=0xffffffff\0" \
65 "fdt_file=undefined\0" \
66 "fdt_addr=0x83000000\0" \
69 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
70 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
71 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
72 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
73 "mmcautodetect=yes\0" \
74 "mmcargs=setenv bootargs console=${console},${baudrate} " \
77 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
78 "bootscript=echo Running bootscript from mmc ...; " \
80 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
81 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
82 "mmcboot=echo Booting from mmc ...; " \
84 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
85 "if run loadfdt; then " \
86 "bootz ${loadaddr} - ${fdt_addr}; " \
88 "if test ${boot_fdt} = try; then " \
91 "echo WARN: Cannot load the DT; " \
97 "netargs=setenv bootargs console=${console},${baudrate} " \
99 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
100 "netboot=echo Booting from net ...; " \
102 "if test ${ip_dyn} = yes; then " \
103 "setenv get_cmd dhcp; " \
105 "setenv get_cmd tftp; " \
107 "${get_cmd} ${image}; " \
108 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
109 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
110 "bootz ${loadaddr} - ${fdt_addr}; " \
112 "if test ${boot_fdt} = try; then " \
115 "echo WARN: Cannot load the DT; " \
122 "if test $fdt_file = undefined; then " \
123 "if test $board_name = EVK && test $board_rev = 9X9; then " \
124 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
125 "if test $board_name = EVK && test $board_rev = 14X14; then " \
126 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
127 "if test $fdt_file = undefined; then " \
128 "echo WARNING: Could not determine dtb to use; fi; " \
131 #define CONFIG_BOOTCOMMAND \
133 "mmc dev ${mmcdev};" \
134 "mmc dev ${mmcdev}; if mmc rescan; then " \
135 "if run loadbootscript; then " \
138 "if run loadimage; then " \
140 "else run netboot; " \
143 "else run netboot; fi"
145 /* Miscellaneous configurable options */
146 #define CONFIG_SYS_MEMTEST_START 0x80000000
147 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
149 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
150 #define CONFIG_SYS_HZ 1000
152 #define CONFIG_CMDLINE_EDITING
154 /* Physical Memory Map */
155 #define CONFIG_NR_DRAM_BANKS 1
156 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
158 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
159 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
160 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
162 #define CONFIG_SYS_INIT_SP_OFFSET \
163 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
164 #define CONFIG_SYS_INIT_SP_ADDR \
165 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
167 /* environment organization */
168 #define CONFIG_ENV_SIZE SZ_8K
169 #define CONFIG_ENV_IS_IN_MMC
170 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
171 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
172 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
173 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
175 #ifndef CONFIG_SYS_DCACHE_OFF
178 #ifdef CONFIG_FSL_QSPI
179 #define CONFIG_SF_DEFAULT_BUS 0
180 #define CONFIG_SF_DEFAULT_CS 0
181 #define CONFIG_SF_DEFAULT_SPEED 40000000
182 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
183 #define FSL_QSPI_FLASH_NUM 1
184 #define FSL_QSPI_FLASH_SIZE SZ_32M
188 #ifdef CONFIG_CMD_USB
189 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
190 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
191 #define CONFIG_MXC_USB_FLAGS 0
192 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
195 #ifdef CONFIG_CMD_NET
196 #define CONFIG_FEC_MXC
198 #define CONFIG_FEC_ENET_DEV 1
200 #if (CONFIG_FEC_ENET_DEV == 0)
201 #define IMX_FEC_BASE ENET_BASE_ADDR
202 #define CONFIG_FEC_MXC_PHYADDR 0x2
203 #define CONFIG_FEC_XCV_TYPE RMII
204 #elif (CONFIG_FEC_ENET_DEV == 1)
205 #define IMX_FEC_BASE ENET2_BASE_ADDR
206 #define CONFIG_FEC_MXC_PHYADDR 0x1
207 #define CONFIG_FEC_XCV_TYPE RMII
209 #define CONFIG_ETHPRIME "FEC"
211 #define CONFIG_PHYLIB
212 #define CONFIG_PHY_MICREL
215 #define CONFIG_IMX_THERMAL
217 #ifndef CONFIG_SPL_BUILD
219 #define CONFIG_VIDEO_MXS
220 #define CONFIG_VIDEO_LOGO
221 #define CONFIG_SPLASH_SCREEN
222 #define CONFIG_SPLASH_SCREEN_ALIGN
223 #define CONFIG_BMP_16BPP
224 #define CONFIG_VIDEO_BMP_RLE8
225 #define CONFIG_VIDEO_BMP_LOGO
226 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR