1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2014 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX6SX Sabresd board.
11 #include <linux/stringify.h>
13 #include "mx6_common.h"
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
22 #define CONFIG_MXC_UART_BASE UART1_BASE
24 #ifdef CONFIG_IMX_BOOTAUX
25 /* Set to QSPI2 B flash at default */
26 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000
28 #define UPDATE_M4_ENV \
29 "m4image=m4_qspi.bin\0" \
30 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
31 "update_m4_from_sd=" \
32 "if sf probe 1:0; then " \
33 "if run loadm4image; then " \
34 "setexpr fw_sz ${filesize} + 0xffff; " \
35 "setexpr fw_sz ${fw_sz} / 0x10000; " \
36 "setexpr fw_sz ${fw_sz} * 0x10000; " \
37 "sf erase 0x0 ${fw_sz}; " \
38 "sf write ${loadaddr} 0x0 ${filesize}; " \
41 "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
43 #define UPDATE_M4_ENV ""
46 #define CONFIG_EXTRA_ENV_SETTINGS \
51 "fdt_high=0xffffffff\0" \
52 "initrd_high=0xffffffff\0" \
53 "fdt_file=imx6sx-sdb.dtb\0" \
54 "fdt_addr=0x88000000\0" \
57 "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \
60 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
61 "mmcargs=setenv bootargs console=${console},${baudrate} " \
62 "root=PARTUUID=${uuid} rootwait rw\0" \
64 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
65 "bootscript=echo Running bootscript from mmc ...; " \
67 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
68 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
69 "mmcboot=echo Booting from mmc ...; " \
72 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
73 "if run loadfdt; then " \
74 "bootz ${loadaddr} - ${fdt_addr}; " \
76 "if test ${boot_fdt} = try; then " \
79 "echo WARN: Cannot load the DT; " \
85 "netargs=setenv bootargs console=${console},${baudrate} " \
87 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
88 "netboot=echo Booting from net ...; " \
90 "if test ${ip_dyn} = yes; then " \
91 "setenv get_cmd dhcp; " \
93 "setenv get_cmd tftp; " \
95 "${get_cmd} ${image}; " \
96 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
97 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
98 "bootz ${loadaddr} - ${fdt_addr}; " \
100 "if test ${boot_fdt} = try; then " \
103 "echo WARN: Cannot load the DT; " \
110 "if test test $board_rev = REVA ; then " \
111 "setenv fdt_file imx6sx-sdb-reva.dtb; fi; " \
113 #define CONFIG_BOOTCOMMAND \
115 "mmc dev ${mmcdev}; if mmc rescan; then " \
116 "if run loadbootscript; then " \
119 "if run loadimage; then " \
121 "else run netboot; " \
124 "else run netboot; fi"
126 /* Miscellaneous configurable options */
128 /* Physical Memory Map */
129 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
131 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
132 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
133 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
135 #define CONFIG_SYS_INIT_SP_OFFSET \
136 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
137 #define CONFIG_SYS_INIT_SP_ADDR \
138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
140 /* MMC Configuration */
141 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
144 #define CONFIG_SYS_I2C_MXC
145 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
146 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
147 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
148 #define CONFIG_SYS_I2C_SPEED 100000
151 #define CONFIG_FEC_MXC
153 #define IMX_FEC_BASE ENET_BASE_ADDR
154 #define CONFIG_FEC_MXC_PHYADDR 0x1
156 #define CONFIG_FEC_XCV_TYPE RGMII
157 #define CONFIG_ETHPRIME "FEC"
159 #ifdef CONFIG_CMD_USB
160 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
161 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
162 #define CONFIG_MXC_USB_FLAGS 0
163 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
166 #ifdef CONFIG_CMD_PCI
167 #define CONFIG_PCI_SCAN_SHOW
168 #define CONFIG_PCIE_IMX
169 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
170 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
173 #define CONFIG_IMX_THERMAL
175 #ifndef CONFIG_SPL_BUILD
177 #define CONFIG_VIDEO_MXS
178 #define CONFIG_VIDEO_LOGO
179 #define CONFIG_VIDEO_BMP_LOGO
180 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
184 #define CONFIG_SYS_FSL_USDHC_NUM 3
186 #endif /* __CONFIG_H */