1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2014 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX6SX Sabresd board.
11 #include "mx6_common.h"
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
20 #define CONFIG_MXC_UART
21 #define CONFIG_MXC_UART_BASE UART1_BASE
23 #ifdef CONFIG_IMX_BOOTAUX
24 /* Set to QSPI2 B flash at default */
25 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000
27 #define UPDATE_M4_ENV \
28 "m4image=m4_qspi.bin\0" \
29 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
30 "update_m4_from_sd=" \
31 "if sf probe 1:0; then " \
32 "if run loadm4image; then " \
33 "setexpr fw_sz ${filesize} + 0xffff; " \
34 "setexpr fw_sz ${fw_sz} / 0x10000; " \
35 "setexpr fw_sz ${fw_sz} * 0x10000; " \
36 "sf erase 0x0 ${fw_sz}; " \
37 "sf write ${loadaddr} 0x0 ${filesize}; " \
40 "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
42 #define UPDATE_M4_ENV ""
45 #define CONFIG_EXTRA_ENV_SETTINGS \
50 "fdt_high=0xffffffff\0" \
51 "initrd_high=0xffffffff\0" \
52 "fdt_file=imx6sx-sdb.dtb\0" \
53 "fdt_addr=0x88000000\0" \
56 "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \
59 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
60 "mmcargs=setenv bootargs console=${console},${baudrate} " \
61 "root=PARTUUID=${uuid} rootwait rw\0" \
63 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
64 "bootscript=echo Running bootscript from mmc ...; " \
66 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
67 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
68 "mmcboot=echo Booting from mmc ...; " \
71 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
72 "if run loadfdt; then " \
73 "bootz ${loadaddr} - ${fdt_addr}; " \
75 "if test ${boot_fdt} = try; then " \
78 "echo WARN: Cannot load the DT; " \
84 "netargs=setenv bootargs console=${console},${baudrate} " \
86 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
87 "netboot=echo Booting from net ...; " \
89 "if test ${ip_dyn} = yes; then " \
90 "setenv get_cmd dhcp; " \
92 "setenv get_cmd tftp; " \
94 "${get_cmd} ${image}; " \
95 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
96 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
97 "bootz ${loadaddr} - ${fdt_addr}; " \
99 "if test ${boot_fdt} = try; then " \
102 "echo WARN: Cannot load the DT; " \
109 "if test test $board_rev = REVA ; then " \
110 "setenv fdt_file imx6sx-sdb-reva.dtb; fi; " \
112 #define CONFIG_BOOTCOMMAND \
114 "mmc dev ${mmcdev}; if mmc rescan; then " \
115 "if run loadbootscript; then " \
118 "if run loadimage; then " \
120 "else run netboot; " \
123 "else run netboot; fi"
125 /* Miscellaneous configurable options */
126 #define CONFIG_SYS_MEMTEST_START 0x80000000
127 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
129 /* Physical Memory Map */
130 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
132 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
133 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
134 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
136 #define CONFIG_SYS_INIT_SP_OFFSET \
137 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
138 #define CONFIG_SYS_INIT_SP_ADDR \
139 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
141 /* MMC Configuration */
142 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
145 #define CONFIG_SYS_I2C_MXC
146 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
147 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
148 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
149 #define CONFIG_SYS_I2C_SPEED 100000
152 #define CONFIG_FEC_MXC
154 #define IMX_FEC_BASE ENET_BASE_ADDR
155 #define CONFIG_FEC_MXC_PHYADDR 0x1
157 #define CONFIG_FEC_XCV_TYPE RGMII
158 #define CONFIG_ETHPRIME "FEC"
160 #define CONFIG_PHY_ATHEROS
162 #ifdef CONFIG_CMD_USB
163 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
164 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
165 #define CONFIG_MXC_USB_FLAGS 0
166 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
169 #ifdef CONFIG_CMD_PCI
170 #define CONFIG_PCI_SCAN_SHOW
171 #define CONFIG_PCIE_IMX
172 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
173 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
176 #define CONFIG_IMX_THERMAL
178 #ifdef CONFIG_FSL_QSPI
179 #define CONFIG_SYS_FSL_QSPI_LE
180 #define CONFIG_SYS_FSL_QSPI_AHB
181 #ifdef CONFIG_MX6SX_SABRESD_REVA
182 #define FSL_QSPI_FLASH_SIZE SZ_16M
184 #define FSL_QSPI_FLASH_SIZE SZ_32M
186 #define FSL_QSPI_FLASH_NUM 2
189 #ifndef CONFIG_SPL_BUILD
191 #define CONFIG_VIDEO_MXS
192 #define CONFIG_VIDEO_LOGO
193 #define CONFIG_SPLASH_SCREEN
194 #define CONFIG_SPLASH_SCREEN_ALIGN
195 #define CONFIG_BMP_16BPP
196 #define CONFIG_VIDEO_BMP_RLE8
197 #define CONFIG_VIDEO_BMP_LOGO
198 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
202 #define CONFIG_SYS_FSL_USDHC_NUM 3
203 #if defined(CONFIG_ENV_IS_IN_MMC)
204 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/
207 #endif /* __CONFIG_H */