1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2014 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX6SX Sabreauto board.
11 #include "mx6_common.h"
13 #define CONFIG_MXC_UART_BASE UART1_BASE
15 #define CONFIG_EXTRA_ENV_SETTINGS \
19 "fdt_high=0xffffffff\0" \
20 "initrd_high=0xffffffff\0" \
21 "fdt_file=imx6sx-sabreauto.dtb\0" \
22 "fdt_addr=0x88000000\0" \
27 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
28 "mmcargs=setenv bootargs console=${console},${baudrate} " \
31 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
32 "bootscript=echo Running bootscript from mmc ...; " \
34 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
35 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
36 "mmcboot=echo Booting from mmc ...; " \
38 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
39 "if run loadfdt; then " \
40 "bootz ${loadaddr} - ${fdt_addr}; " \
42 "if test ${boot_fdt} = try; then " \
45 "echo WARN: Cannot load the DT; " \
51 "netargs=setenv bootargs console=${console},${baudrate} " \
53 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
54 "netboot=echo Booting from net ...; " \
56 "if test ${ip_dyn} = yes; then " \
57 "setenv get_cmd dhcp; " \
59 "setenv get_cmd tftp; " \
61 "${get_cmd} ${image}; " \
62 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
63 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
64 "bootz ${loadaddr} - ${fdt_addr}; " \
66 "if test ${boot_fdt} = try; then " \
69 "echo WARN: Cannot load the DT; " \
76 /* Miscellaneous configurable options */
78 /* Physical Memory Map */
79 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
81 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
82 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
83 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
85 #define CONFIG_SYS_INIT_SP_OFFSET \
86 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
87 #define CONFIG_SYS_INIT_SP_ADDR \
88 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
90 /* MMC Configuration */
91 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
94 #define CONFIG_SYS_MAX_NAND_DEVICE 1
95 #define CONFIG_SYS_NAND_BASE 0x40000000
97 /* DMA stuff, needed for GPMI/MXS NAND support */
101 #define IMX_FEC_BASE ENET2_BASE_ADDR
102 #define CONFIG_FEC_MXC_PHYADDR 0x0
104 #ifdef CONFIG_CMD_USB
105 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
106 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
107 #define CONFIG_MXC_USB_FLAGS 0
108 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
111 #define CONFIG_SYS_FSL_USDHC_NUM 2
113 #endif /* __CONFIG_H */