Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig
[platform/kernel/u-boot.git] / include / configs / mx6sxsabreauto.h
1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SX Sabreauto board.
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include "mx6_common.h"
13
14 /* Size of malloc() pool */
15 #define CONFIG_SYS_MALLOC_LEN           (3 * SZ_1M)
16
17 #define CONFIG_BOARD_EARLY_INIT_F
18
19 #define CONFIG_MXC_UART
20 #define CONFIG_MXC_UART_BASE            UART1_BASE
21
22 #define CONFIG_EXTRA_ENV_SETTINGS \
23         "script=boot.scr\0" \
24         "image=zImage\0" \
25         "console=ttymxc0\0" \
26         "fdt_high=0xffffffff\0" \
27         "initrd_high=0xffffffff\0" \
28         "fdt_file=imx6sx-sabreauto.dtb\0" \
29         "fdt_addr=0x88000000\0" \
30         "boot_fdt=try\0" \
31         "ip_dyn=yes\0" \
32         "mmcdev=0\0" \
33         "mmcpart=1\0" \
34         "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
35         "mmcargs=setenv bootargs console=${console},${baudrate} " \
36                 "root=${mmcroot}\0" \
37         "loadbootscript=" \
38                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
39         "bootscript=echo Running bootscript from mmc ...; " \
40                 "source\0" \
41         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
42         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
43         "mmcboot=echo Booting from mmc ...; " \
44                 "run mmcargs; " \
45                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
46                         "if run loadfdt; then " \
47                                 "bootz ${loadaddr} - ${fdt_addr}; " \
48                         "else " \
49                                 "if test ${boot_fdt} = try; then " \
50                                         "bootz; " \
51                                 "else " \
52                                         "echo WARN: Cannot load the DT; " \
53                                 "fi; " \
54                         "fi; " \
55                 "else " \
56                         "bootz; " \
57                 "fi;\0" \
58         "netargs=setenv bootargs console=${console},${baudrate} " \
59                 "root=/dev/nfs " \
60         "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
61                 "netboot=echo Booting from net ...; " \
62                 "run netargs; " \
63                 "if test ${ip_dyn} = yes; then " \
64                         "setenv get_cmd dhcp; " \
65                 "else " \
66                         "setenv get_cmd tftp; " \
67                 "fi; " \
68                 "${get_cmd} ${image}; " \
69                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
70                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
71                                 "bootz ${loadaddr} - ${fdt_addr}; " \
72                         "else " \
73                                 "if test ${boot_fdt} = try; then " \
74                                         "bootz; " \
75                                 "else " \
76                                         "echo WARN: Cannot load the DT; " \
77                                 "fi; " \
78                         "fi; " \
79                 "else " \
80                         "bootz; " \
81                 "fi;\0"
82
83 #define CONFIG_BOOTCOMMAND \
84            "mmc dev ${mmcdev};" \
85            "mmc dev ${mmcdev}; if mmc rescan; then " \
86                    "if run loadbootscript; then " \
87                            "run bootscript; " \
88                    "else " \
89                            "if run loadimage; then " \
90                                    "run mmcboot; " \
91                            "else run netboot; " \
92                            "fi; " \
93                    "fi; " \
94            "else run netboot; fi"
95
96 /* Miscellaneous configurable options */
97 #define CONFIG_SYS_MEMTEST_START        0x80000000
98 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x10000)
99
100 #define CONFIG_STACKSIZE                SZ_128K
101
102 /* Physical Memory Map */
103 #define CONFIG_NR_DRAM_BANKS            1
104 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
105
106 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
107 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
108 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
109
110 #define CONFIG_SYS_INIT_SP_OFFSET \
111         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
112 #define CONFIG_SYS_INIT_SP_ADDR \
113         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
114
115 /* MMC Configuration */
116 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
117
118 /* I2C Configs */
119 #define CONFIG_SYS_I2C
120 #define CONFIG_SYS_I2C_MXC
121 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
122 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
123 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
124 #define CONFIG_SYS_I2C_SPEED              100000
125
126 /* PMIC */
127 #define CONFIG_POWER
128 #define CONFIG_POWER_I2C
129 #define CONFIG_POWER_PFUZE100
130 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
131
132 /* NAND flash command */
133 #define CONFIG_CMD_NAND
134 #define CONFIG_CMD_NAND_TRIMFFS
135
136 /* NAND stuff */
137 #define CONFIG_NAND_MXS
138 #define CONFIG_SYS_MAX_NAND_DEVICE     1
139 #define CONFIG_SYS_NAND_BASE           0x40000000
140 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
141 #define CONFIG_SYS_NAND_ONFI_DETECTION
142
143 /* DMA stuff, needed for GPMI/MXS NAND support */
144 #define CONFIG_APBH_DMA
145 #define CONFIG_APBH_DMA_BURST
146 #define CONFIG_APBH_DMA_BURST8
147
148 /* Network */
149
150 #define CONFIG_FEC_MXC
151 #define CONFIG_MII
152
153 #define IMX_FEC_BASE                    ENET2_BASE_ADDR
154 #define CONFIG_FEC_MXC_PHYADDR          0x0
155
156 #define CONFIG_FEC_XCV_TYPE             RGMII
157 #define CONFIG_ETHPRIME                 "FEC"
158
159 #define CONFIG_PHYLIB
160 #define CONFIG_PHY_ATHEROS
161
162 #ifdef CONFIG_CMD_USB
163 #define CONFIG_USB_EHCI
164 #define CONFIG_USB_EHCI_MX6
165 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
166 #define CONFIG_USB_HOST_ETHER
167 #define CONFIG_USB_ETHER_ASIX
168 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
169 #define CONFIG_MXC_USB_FLAGS   0
170 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
171 #endif
172
173 #define CONFIG_IMX_THERMAL
174
175 #ifdef CONFIG_FSL_QSPI
176 #define CONFIG_SYS_FSL_QSPI_AHB
177 #define CONFIG_SF_DEFAULT_BUS           0
178 #define CONFIG_SF_DEFAULT_CS            0
179 #define CONFIG_SF_DEFAULT_SPEED 40000000
180 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
181 #define FSL_QSPI_FLASH_SIZE             SZ_32M
182 #define FSL_QSPI_FLASH_NUM              2
183 #endif
184
185 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
186 #define CONFIG_ENV_SIZE                 SZ_8K
187 #define CONFIG_ENV_IS_IN_MMC
188
189 #define CONFIG_SYS_FSL_USDHC_NUM        2
190 #if defined(CONFIG_ENV_IS_IN_MMC)
191 #define CONFIG_SYS_MMC_ENV_DEV          0  /*USDHC3*/
192 #endif
193
194 #define CONFIG_PCA953X
195 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x30, 8}, {0x32, 8}, {0x34, 8} }
196
197 #endif                          /* __CONFIG_H */