2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SL EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "mx6_common.h"
15 #define CONFIG_SPL_LIBCOMMON_SUPPORT
16 #define CONFIG_SPL_MMC_SUPPORT
20 #define MACH_TYPE_MX6SLEVK 4307
21 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
26 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
32 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
35 #define CONFIG_CMD_I2C
36 #define CONFIG_SYS_I2C
37 #define CONFIG_SYS_I2C_MXC
38 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
39 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
40 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
41 #define CONFIG_SYS_I2C_SPEED 100000
45 #define CONFIG_POWER_I2C
46 #define CONFIG_POWER_PFUZE100
47 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
49 #define CONFIG_CMD_PING
50 #define CONFIG_CMD_DHCP
51 #define CONFIG_CMD_MII
52 #define CONFIG_FEC_MXC
54 #define IMX_FEC_BASE ENET_BASE_ADDR
55 #define CONFIG_FEC_XCV_TYPE RMII
56 #define CONFIG_ETHPRIME "FEC"
57 #define CONFIG_FEC_MXC_PHYADDR 0
60 #define CONFIG_PHY_SMSC
62 #define CONFIG_EXTRA_ENV_SETTINGS \
66 "fdt_high=0xffffffff\0" \
67 "initrd_high=0xffffffff\0" \
68 "fdt_file=imx6sl-evk.dtb\0" \
69 "fdt_addr=0x88000000\0" \
74 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
75 "mmcargs=setenv bootargs console=${console},${baudrate} " \
78 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
79 "bootscript=echo Running bootscript from mmc ...; " \
81 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
82 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
83 "mmcboot=echo Booting from mmc ...; " \
85 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
86 "if run loadfdt; then " \
87 "bootz ${loadaddr} - ${fdt_addr}; " \
89 "if test ${boot_fdt} = try; then " \
92 "echo WARN: Cannot load the DT; " \
98 "netargs=setenv bootargs console=${console},${baudrate} " \
100 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
101 "netboot=echo Booting from net ...; " \
103 "if test ${ip_dyn} = yes; then " \
104 "setenv get_cmd dhcp; " \
106 "setenv get_cmd tftp; " \
108 "${get_cmd} ${image}; " \
109 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
110 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
111 "bootz ${loadaddr} - ${fdt_addr}; " \
113 "if test ${boot_fdt} = try; then " \
116 "echo WARN: Cannot load the DT; " \
123 #define CONFIG_BOOTCOMMAND \
124 "mmc dev ${mmcdev};" \
125 "mmc dev ${mmcdev}; if mmc rescan; then " \
126 "if run loadbootscript; then " \
129 "if run loadimage; then " \
131 "else run netboot; " \
134 "else run netboot; fi"
136 /* Miscellaneous configurable options */
137 #define CONFIG_SYS_MEMTEST_START 0x80000000
138 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
140 #define CONFIG_STACKSIZE SZ_128K
142 /* Physical Memory Map */
143 #define CONFIG_NR_DRAM_BANKS 1
144 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
145 #define PHYS_SDRAM_SIZE SZ_1G
147 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
148 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
149 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
151 #define CONFIG_SYS_INIT_SP_OFFSET \
152 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
153 #define CONFIG_SYS_INIT_SP_ADDR \
154 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
156 /* Environment organization */
157 #define CONFIG_ENV_SIZE SZ_8K
159 #if defined CONFIG_SYS_BOOT_SPINOR
160 #define CONFIG_ENV_IS_IN_SPI_FLASH
161 #define CONFIG_ENV_OFFSET (768 * 1024)
162 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
163 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
164 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
165 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
166 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
168 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
169 #define CONFIG_ENV_IS_IN_MMC
172 #define CONFIG_CMD_SF
174 #define CONFIG_SPI_FLASH_STMICRO
175 #define CONFIG_MXC_SPI
176 #define CONFIG_SF_DEFAULT_BUS 0
177 #define CONFIG_SF_DEFAULT_CS 0
178 #define CONFIG_SF_DEFAULT_SPEED 20000000
179 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
183 #define CONFIG_CMD_USB
184 #ifdef CONFIG_CMD_USB
185 #define CONFIG_USB_EHCI
186 #define CONFIG_USB_EHCI_MX6
187 #define CONFIG_USB_STORAGE
188 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
189 #define CONFIG_USB_HOST_ETHER
190 #define CONFIG_USB_ETHER_ASIX
191 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
192 #define CONFIG_MXC_USB_FLAGS 0
193 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
196 #define CONFIG_SYS_FSL_USDHC_NUM 3
197 #if defined(CONFIG_ENV_IS_IN_MMC)
198 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
201 #define CONFIG_IMX_THERMAL
203 #endif /* __CONFIG_H */