2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SL EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "mx6_common.h"
18 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SL_EVK
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
23 #define CONFIG_MXC_UART
24 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
27 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
30 #define CONFIG_SYS_I2C_MXC
31 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
32 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
33 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
34 #define CONFIG_SYS_I2C_SPEED 100000
36 #define CONFIG_FEC_MXC
38 #define IMX_FEC_BASE ENET_BASE_ADDR
39 #define CONFIG_FEC_XCV_TYPE RMII
40 #define CONFIG_FEC_MXC_PHYADDR 0
43 #define CONFIG_PHY_SMSC
45 #define CONFIG_EXTRA_ENV_SETTINGS \
49 "fdt_high=0xffffffff\0" \
50 "initrd_high=0xffffffff\0" \
51 "fdt_file=imx6sl-evk.dtb\0" \
52 "fdt_addr=0x88000000\0" \
57 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
58 "mmcargs=setenv bootargs console=${console},${baudrate} " \
61 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
62 "bootscript=echo Running bootscript from mmc ...; " \
64 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
65 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
66 "mmcboot=echo Booting from mmc ...; " \
68 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
69 "if run loadfdt; then " \
70 "bootz ${loadaddr} - ${fdt_addr}; " \
72 "if test ${boot_fdt} = try; then " \
75 "echo WARN: Cannot load the DT; " \
81 "netargs=setenv bootargs console=${console},${baudrate} " \
83 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
84 "netboot=echo Booting from net ...; " \
86 "if test ${ip_dyn} = yes; then " \
87 "setenv get_cmd dhcp; " \
89 "setenv get_cmd tftp; " \
91 "${get_cmd} ${image}; " \
92 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
93 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
94 "bootz ${loadaddr} - ${fdt_addr}; " \
96 "if test ${boot_fdt} = try; then " \
99 "echo WARN: Cannot load the DT; " \
106 #define CONFIG_BOOTCOMMAND \
107 "mmc dev ${mmcdev};" \
108 "mmc dev ${mmcdev}; if mmc rescan; then " \
109 "if run loadbootscript; then " \
112 "if run loadimage; then " \
114 "else run netboot; " \
117 "else run netboot; fi"
119 /* Miscellaneous configurable options */
120 #define CONFIG_SYS_MEMTEST_START 0x80000000
121 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
123 /* Physical Memory Map */
124 #define CONFIG_NR_DRAM_BANKS 1
125 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
127 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
128 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
129 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
131 #define CONFIG_SYS_INIT_SP_OFFSET \
132 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
133 #define CONFIG_SYS_INIT_SP_ADDR \
134 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
136 /* Environment organization */
137 #define CONFIG_ENV_SIZE SZ_8K
139 #if defined CONFIG_SPI_BOOT
140 #define CONFIG_ENV_IS_IN_SPI_FLASH
141 #define CONFIG_ENV_OFFSET (768 * 1024)
142 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
143 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
144 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
145 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
146 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
148 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
149 #define CONFIG_ENV_IS_IN_MMC
153 #define CONFIG_MXC_SPI
154 #define CONFIG_SF_DEFAULT_BUS 0
155 #define CONFIG_SF_DEFAULT_CS 0
156 #define CONFIG_SF_DEFAULT_SPEED 20000000
157 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
161 #ifdef CONFIG_CMD_USB
162 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
163 #define CONFIG_USB_HOST_ETHER
164 #define CONFIG_USB_ETHER_ASIX
165 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
166 #define CONFIG_MXC_USB_FLAGS 0
167 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
170 #define CONFIG_SYS_FSL_USDHC_NUM 3
171 #if defined(CONFIG_ENV_IS_IN_MMC)
172 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
175 #define CONFIG_IMX_THERMAL
177 #endif /* __CONFIG_H */