2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
29 #define CONFIG_MACH_TYPE 3769
31 #include <asm/arch/imx-regs.h>
32 #include <asm/imx-common/gpio.h>
34 #define CONFIG_CMDLINE_TAG
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_INITRD_TAG
37 #define CONFIG_REVISION_TAG
39 /* Size of malloc() pool */
40 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_MISC_INIT_R
44 #define CONFIG_MXC_GPIO
46 #define CONFIG_MXC_UART
47 #define CONFIG_MXC_UART_BASE UART2_BASE
51 #define CONFIG_SPI_FLASH
52 #define CONFIG_SPI_FLASH_SST
53 #define CONFIG_MXC_SPI
54 #define CONFIG_SF_DEFAULT_BUS 0
55 #define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
56 #define CONFIG_SF_DEFAULT_SPEED 25000000
57 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
61 #define CONFIG_CMD_I2C
62 #define CONFIG_I2C_MULTI_BUS
63 #define CONFIG_I2C_MXC
64 #define CONFIG_SYS_I2C_SPEED 100000
67 #define CONFIG_FSL_ESDHC
68 #define CONFIG_FSL_USDHC
69 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
70 #define CONFIG_SYS_FSL_USDHC_NUM 2
73 #define CONFIG_CMD_MMC
74 #define CONFIG_GENERIC_MMC
75 #define CONFIG_CMD_EXT2
76 #define CONFIG_CMD_FAT
77 #define CONFIG_DOS_PARTITION
79 #define CONFIG_CMD_SATA
83 #ifdef CONFIG_CMD_SATA
84 #define CONFIG_DWC_AHSATA
85 #define CONFIG_SYS_SATA_MAX_DEVICE 1
86 #define CONFIG_DWC_AHSATA_PORT_ID 0
87 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
92 #define CONFIG_CMD_PING
93 #define CONFIG_CMD_DHCP
94 #define CONFIG_CMD_MII
95 #define CONFIG_CMD_NET
96 #define CONFIG_FEC_MXC
98 #define IMX_FEC_BASE ENET_BASE_ADDR
99 #define CONFIG_FEC_XCV_TYPE RGMII
100 #define CONFIG_ETHPRIME "FEC"
101 #define CONFIG_FEC_MXC_PHYADDR 6
102 #define CONFIG_PHYLIB
103 #define CONFIG_PHY_MICREL
104 #define CONFIG_PHY_MICREL_KSZ9021
107 #define CONFIG_CMD_USB
108 #define CONFIG_CMD_FAT
109 #define CONFIG_USB_EHCI
110 #define CONFIG_USB_EHCI_MX6
111 #define CONFIG_USB_STORAGE
112 #define CONFIG_USB_HOST_ETHER
113 #define CONFIG_USB_ETHER_ASIX
114 #define CONFIG_USB_ETHER_SMSC95XX
115 #define CONFIG_MXC_USB_PORT 1
116 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
117 #define CONFIG_MXC_USB_FLAGS 0
119 /* Miscellaneous commands */
120 #define CONFIG_CMD_BMODE
122 /* Framebuffer and LCD */
124 #define CONFIG_VIDEO_IPUV3
125 #define CONFIG_CFB_CONSOLE
126 #define CONFIG_VGA_AS_SINGLE_DEVICE
127 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
128 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
129 #define CONFIG_VIDEO_BMP_RLE8
130 #define CONFIG_SPLASH_SCREEN
131 #define CONFIG_BMP_16BPP
132 #define CONFIG_VIDEO_LOGO
133 #define CONFIG_IPUV3_CLK 260000000
135 /* allow to overwrite serial and ethaddr */
136 #define CONFIG_ENV_OVERWRITE
137 #define CONFIG_CONS_INDEX 1
138 #define CONFIG_BAUDRATE 115200
140 /* Command definition */
141 #include <config_cmd_default.h>
143 #undef CONFIG_CMD_IMLS
145 #define CONFIG_BOOTDELAY 3
147 #define CONFIG_PREBOOT ""
149 #define CONFIG_LOADADDR 0x10800000
150 #define CONFIG_SYS_TEXT_BASE 0x17800000
152 #define CONFIG_EXTRA_ENV_SETTINGS \
153 "script=boot.scr\0" \
155 "console=ttymxc1\0" \
156 "fdt_high=0xffffffff\0" \
157 "initrd_high=0xffffffff\0" \
160 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
161 "mmcargs=setenv bootargs console=${console},${baudrate} " \
162 "root=${mmcroot}\0" \
164 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
165 "bootscript=echo Running bootscript from mmc ...; " \
167 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
168 "mmcboot=echo Booting from mmc ...; " \
171 "netargs=setenv bootargs console=${console},${baudrate} " \
173 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
174 "netboot=echo Booting from net ...; " \
176 "dhcp ${uimage}; bootm\0" \
178 #define CONFIG_BOOTCOMMAND \
179 "mmc dev ${mmcdev};" \
180 "if mmc rescan ${mmcdev}; then " \
181 "if run loadbootscript; then " \
184 "if run loaduimage; then " \
186 "else run netboot; " \
189 "else run netboot; fi"
191 #define CONFIG_ARP_TIMEOUT 200UL
193 /* Miscellaneous configurable options */
194 #define CONFIG_SYS_LONGHELP
195 #define CONFIG_SYS_HUSH_PARSER
196 #define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
197 #define CONFIG_AUTO_COMPLETE
198 #define CONFIG_SYS_CBSIZE 256
200 /* Print Buffer Size */
201 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
202 #define CONFIG_SYS_MAXARGS 16
203 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
205 #define CONFIG_SYS_MEMTEST_START 0x10000000
206 #define CONFIG_SYS_MEMTEST_END 0x10010000
208 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
209 #define CONFIG_SYS_HZ 1000
211 #define CONFIG_CMDLINE_EDITING
213 /* Physical Memory Map */
214 #define CONFIG_NR_DRAM_BANKS 1
215 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
216 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
218 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
219 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
220 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
222 #define CONFIG_SYS_INIT_SP_OFFSET \
223 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
224 #define CONFIG_SYS_INIT_SP_ADDR \
225 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
227 /* FLASH and environment organization */
228 #define CONFIG_SYS_NO_FLASH
230 #define CONFIG_ENV_SIZE (8 * 1024)
232 #define CONFIG_ENV_IS_IN_MMC
233 /* #define CONFIG_ENV_IS_IN_SPI_FLASH */
235 #if defined(CONFIG_ENV_IS_IN_MMC)
236 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
237 #define CONFIG_SYS_MMC_ENV_DEV 0
238 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
239 #define CONFIG_ENV_OFFSET (768 * 1024)
240 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
241 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
242 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
243 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
244 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
247 #define CONFIG_OF_LIBFDT
248 #define CONFIG_CMD_BOOTZ
250 #define CONFIG_SYS_DCACHE_OFF
252 #ifndef CONFIG_SYS_DCACHE_OFF
253 #define CONFIG_CMD_CACHE
256 #endif /* __CONFIG_H */