1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
9 #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
10 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
11 #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
13 #ifndef CONFIG_SYS_L2CACHE_OFF
14 #define CONFIG_SYS_L2_PL310
15 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
19 #define CONFIG_BOARD_POSTCLK_INIT
20 #define CONFIG_MXC_GPT_HCLK
22 #define CONFIG_SYS_BOOTM_LEN 0x1000000
24 #include <linux/sizes.h>
25 #include <asm/arch/imx-regs.h>
26 #include <asm/mach-imx/gpio.h>
32 #define CONFIG_SYS_FSL_CLK
35 #define CONFIG_CMDLINE_TAG
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_REVISION_TAG
41 #if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
42 defined(CONFIG_MX6SX) || \
43 defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
44 #define CONFIG_LOADADDR 0x82000000
46 #define CONFIG_LOADADDR 0x12000000
48 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
50 /* allow to overwrite serial and ethaddr */
51 #define CONFIG_ENV_OVERWRITE
53 /* Miscellaneous configurable options */
54 #define CONFIG_SYS_CBSIZE 512
55 #define CONFIG_SYS_MAXARGS 32
58 #define CONFIG_BOUNCE_BUFFER
59 #define CONFIG_FSL_USDHC
62 #define CONFIG_MXC_OCOTP
64 /* Secure boot (HAB) support */
65 #ifdef CONFIG_SECURE_BOOT
66 #define CONFIG_CSF_SIZE 0x2000
67 #ifdef CONFIG_SPL_BUILD
68 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT