1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
5 * Configuration settings for the MX53SMD Freescale board.
11 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
13 #include <asm/arch/imx-regs.h>
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_REVISION_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25 #define CONFIG_MXC_UART_BASE UART1_BASE
28 #define CONFIG_SYS_I2C
29 #define CONFIG_SYS_I2C_MXC
30 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
31 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
32 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
36 #define CONFIG_SYS_FSL_ESDHC_NUM 1
39 #define CONFIG_HAS_ETH1
41 #define CONFIG_FEC_MXC
42 #define IMX_FEC_BASE FEC_BASE_ADDR
43 #define CONFIG_FEC_MXC_PHYADDR 0x1F
45 /* Command definition */
47 #define CONFIG_ETHPRIME "FEC0"
49 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
51 #define CONFIG_EXTRA_ENV_SETTINGS \
56 "mmcroot=/dev/mmcblk0p3 rw\0" \
57 "mmcrootfstype=ext3 rootwait\0" \
58 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
60 "rootfstype=${mmcrootfstype}\0" \
62 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
63 "bootscript=echo Running bootscript from mmc ...; " \
65 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
66 "mmcboot=echo Booting from mmc ...; " \
69 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
71 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
72 "netboot=echo Booting from net ...; " \
74 "dhcp ${uimage}; bootm\0" \
76 #define CONFIG_BOOTCOMMAND \
77 "mmc dev ${mmcdev}; if mmc rescan; then " \
78 "if run loadbootscript; then " \
81 "if run loaduimage; then " \
83 "else run netboot; " \
86 "else run netboot; fi"
87 #define CONFIG_ARP_TIMEOUT 200UL
89 /* Miscellaneous configurable options */
91 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
93 /* Physical Memory Map */
94 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
95 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
96 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
97 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
98 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
100 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
101 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
102 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
104 #define CONFIG_SYS_INIT_SP_OFFSET \
105 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
106 #define CONFIG_SYS_INIT_SP_ADDR \
107 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
109 /* environment organization */
111 #endif /* __CONFIG_H */