1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Jason Liu <r64343@freescale.com>
6 * Configuration settings for Freescale MX53 low cost board.
12 #include <asm/arch/imx-regs.h>
14 #define CONSOLE_DEV "ttymxc0"
16 #define CONFIG_CMDLINE_TAG
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
25 #define CONFIG_BOARD_LATE_INIT
26 #define CONFIG_REVISION_TAG
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE UART1_BASE
33 #define CONFIG_FEC_MXC
34 #define IMX_FEC_BASE FEC_BASE_ADDR
35 #define CONFIG_FEC_MXC_PHYADDR 0x1F
38 #define CONFIG_USB_HOST_ETHER
39 #define CONFIG_USB_ETHER_ASIX
40 #define CONFIG_USB_ETHER_MCS7830
41 #define CONFIG_USB_ETHER_SMSC95XX
42 #define CONFIG_MXC_USB_PORT 1
43 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
44 #define CONFIG_MXC_USB_FLAGS 0
46 #define CONFIG_SYS_RTC_BUS_NUM 2
47 #define CONFIG_SYS_I2C_RTC_ADDR 0x30
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
53 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
54 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
58 #define CONFIG_POWER_I2C
59 #define CONFIG_DIALOG_POWER
60 #define CONFIG_POWER_FSL
61 #define CONFIG_POWER_FSL_MC13892
62 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
63 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_BAUDRATE 115200
69 /* Command definition */
71 #define CONFIG_ETHPRIME "FEC0"
73 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
75 #define PPD_CONFIG_NFS \
76 "nfsserver=192.168.252.95\0" \
77 "gatewayip=192.168.252.95\0" \
78 "netmask=255.255.255.0\0" \
79 "ipaddr=192.168.252.99\0" \
82 "nfsroot=/opt/springdale/rd\0" \
83 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
84 "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \
85 "choose_ip=if test $use_dhcp = 1; then setenv kern_ipconf ip=dhcp; " \
86 "setenv getcmd dhcp; else setenv kern_ipconf " \
87 "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \
88 "setenv getcmd tftp; fi\0" \
89 "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \
90 "${nfsserver}:${image}; bootm ${loadaddr}\0" \
92 #define CONFIG_EXTRA_ENV_SETTINGS \
94 "image=/boot/fitImage\0" \
95 "fdt_high=0xffffffff\0" \
98 "rootdev=mmcblk0p\0" \
99 "quiet=quiet loglevel=0\0" \
100 "console=" CONSOLE_DEV "\0" \
102 "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \
103 "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \
104 "console=${console}\0" \
105 "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \
106 "rootwait ${bootargs}\0" \
107 "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
108 "then setenv quiet; fi\0" \
109 "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
110 "/boot/bootcause/firstboot\0" \
111 "swappartitions=setexpr partnum 3 - ${partnum}\0" \
114 "msg=\"Monitor failed to start. " \
115 "Try again, or contact GE Service for support.\"; " \
117 "setenv stdout vga; " \
118 "echo \"\n\n\n\n \" $msg; " \
119 "setenv stdout serial; " \
120 "mw.b 0x7000A000 0xbc; " \
121 "mw.b 0x7000A001 0x00; " \
122 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
125 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
126 "run hasfirstboot || setenv partnum 0; " \
127 "if test ${partnum} != 0; then " \
128 "setenv bootcause REVERT; " \
129 "run swappartitions loadimage doboot; " \
131 "run failbootcmd\0" \
133 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
135 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
137 "run bootargs_emmc; " \
138 "bootm ${loadaddr}\0" \
140 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
141 "run loadimage || run swappartitions && run loadimage || " \
142 "setenv partnum 0 && echo MISSING IMAGE;" \
144 "run failbootcmd\0" \
146 "lcd:800x480-24@60,monitor=lcd\0" \
148 #define CONFIG_MMCBOOTCOMMAND \
149 "if mmc dev ${devnum}; then " \
154 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
156 #define CONFIG_ARP_TIMEOUT 200UL
158 /* Miscellaneous configurable options */
159 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
161 #define CONFIG_SYS_MAXARGS 48 /* max number of command args */
162 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
164 #define CONFIG_SYS_MEMTEST_START 0x70000000
165 #define CONFIG_SYS_MEMTEST_END 0x70010000
167 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
169 /* Physical Memory Map */
170 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
171 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
172 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
173 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
174 #define PHYS_SDRAM_SIZE (gd->ram_size)
176 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
177 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
178 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
180 #define CONFIG_SYS_INIT_SP_OFFSET \
181 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
182 #define CONFIG_SYS_INIT_SP_ADDR \
183 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
185 /* FLASH and environment organization */
186 #define CONFIG_SYS_MMC_ENV_DEV 0
188 #define CONFIG_CMD_FUSE
189 #define CONFIG_FSL_IIM
191 #define CONFIG_SYS_I2C_SPEED 100000
194 #define CONFIG_SYS_NUM_I2C_BUSES 9
195 #define CONFIG_SYS_I2C_MAX_HOPS 1
196 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
197 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
198 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
199 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
200 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
201 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
202 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
203 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
204 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
209 /* Backlight Control */
210 #define CONFIG_IMX6_PWM_PER_CLK 66666000
212 #endif /* __CONFIG_H */